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authorStefan Roese <sr@denx.de>2007-07-16 10:01:38 +0200
committerStefan Roese <sr@denx.de>2007-07-16 10:01:38 +0200
commit2a49fc17d09020e7ebd9536694d99d20e419fcb8 (patch)
tree9c6758ed6d26013a368485d340807eadd6840ba6 /board/amcc/luan
parentdf3f17422aeb03fb81a7ac8c78d2b05d05aa4cf9 (diff)
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ppc4xx: AMCC Luan uses the new boardspecific DDR2 controller setup
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/amcc/luan')
-rw-r--r--board/amcc/luan/luan.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/board/amcc/luan/luan.c b/board/amcc/luan/luan.c
index 2eff3b3..7b16f8a 100644
--- a/board/amcc/luan/luan.c
+++ b/board/amcc/luan/luan.c
@@ -104,6 +104,13 @@ int checkboard(void)
return 0;
}
+/*
+ * Override the default functions in cpu/ppc4xx/44x_spd_ddr2.c with
+ * board specific values.
+ */
+u32 ddr_clktr(u32 default_val) {
+ return (SDRAM_CLKTR_CLKP_180_DEG_ADV);
+}
/*************************************************************************
* int testdram()