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| author | Haavard Skinnemoen <hskinnemoen@atmel.com> | 2007-10-02 19:05:53 +0200 |
|---|---|---|
| committer | Haavard Skinnemoen <hskinnemoen@atmel.com> | 2007-10-02 19:05:53 +0200 |
| commit | b90296fc39a33f84bb2b0aa79bf997be495ba791 (patch) | |
| tree | 4ea0d61df25d10fe7552aedf781fd167f4c670fe /board/amcc/luan/luan.c | |
| parent | e80e585b00fbbab7ad1bf71619741f2c5b029ab7 (diff) | |
| parent | 527c80f012030fa0b51f8594847ec56c9317e9b1 (diff) | |
| download | u-boot-imx-b90296fc39a33f84bb2b0aa79bf997be495ba791.zip u-boot-imx-b90296fc39a33f84bb2b0aa79bf997be495ba791.tar.gz u-boot-imx-b90296fc39a33f84bb2b0aa79bf997be495ba791.tar.bz2 | |
Merge commit 'origin/master'
Diffstat (limited to 'board/amcc/luan/luan.c')
| -rw-r--r-- | board/amcc/luan/luan.c | 24 |
1 files changed, 19 insertions, 5 deletions
diff --git a/board/amcc/luan/luan.c b/board/amcc/luan/luan.c index 2eff3b3..0067ce0 100644 --- a/board/amcc/luan/luan.c +++ b/board/amcc/luan/luan.c @@ -39,8 +39,6 @@ extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ ************************************************************************/ int board_early_init_f(void) { - volatile epld_t *x = (epld_t *) CFG_EPLD_BASE; - mtebc( pb0ap, 0x03800000 ); /* set chip selects */ mtebc( pb0cr, 0xffc58000 ); /* ebc0_b0cr, 4MB at 0xffc00000 CS0 */ mtebc( pb1ap, 0x03800000 ); @@ -66,8 +64,6 @@ int board_early_init_f(void) mtdcr( uic0sr, 0x00000000 ); /* clear all interrupts */ mtdcr( uic0sr, 0xffffffff ); - x->ethuart &= ~EPLD2_RESET_ETH_N; /* put Ethernet+PHY in reset */ - return 0; } @@ -79,7 +75,18 @@ int board_early_init_f(void) int misc_init_r(void) { volatile epld_t *x = (epld_t *) CFG_EPLD_BASE; - x->ethuart |= EPLD2_RESET_ETH_N; /* take Ethernet+PHY out of reset */ + + /* set modes of operation */ + x->ethuart |= EPLD2_ETH_MODE_10 | EPLD2_ETH_MODE_100 | + EPLD2_ETH_MODE_1000 | EPLD2_ETH_DUPLEX_MODE; + /* clear ETHERNET_AUTO_NEGO bit to turn on autonegotiation */ + x->ethuart &= ~EPLD2_ETH_AUTO_NEGO; + + /* put Ethernet+PHY in reset */ + x->ethuart &= ~EPLD2_RESET_ETH_N; + udelay(10000); + /* take Ethernet+PHY out of reset */ + x->ethuart |= EPLD2_RESET_ETH_N; return 0; } @@ -104,6 +111,13 @@ int checkboard(void) return 0; } +/* + * Override the default functions in cpu/ppc4xx/44x_spd_ddr2.c with + * board specific values. + */ +u32 ddr_clktr(u32 default_val) { + return (SDRAM_CLKTR_CLKP_180_DEG_ADV); +} /************************************************************************* * int testdram() |