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authorStefan Roese <sr@denx.de>2008-10-13 15:15:31 +0200
committerStefan Roese <sr@denx.de>2008-10-21 17:35:02 +0200
commitf4d14c55504ce40287321bd63ee269e3233ee4ae (patch)
tree738b9386dbd43c8414a954f81e0501793ed46e49 /board/amcc/canyonlands
parent43cbce69d48d052574d71f50724be546d90a46a4 (diff)
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ppc4xx: Add 1.0 & 1.066 GHz to canyonlands bootstrap command for PLL setup
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/amcc/canyonlands')
-rw-r--r--board/amcc/canyonlands/bootstrap.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/board/amcc/canyonlands/bootstrap.c b/board/amcc/canyonlands/bootstrap.c
index 6b74743..b1f4a21 100644
--- a/board/amcc/canyonlands/bootstrap.c
+++ b/board/amcc/canyonlands/bootstrap.c
@@ -40,6 +40,8 @@
static char *config_labels[] = {
"CPU: 600 PLB: 200 OPB: 100 EBC: 100",
"CPU: 800 PLB: 200 OPB: 100 EBC: 100",
+ "CPU:1000 PLB: 200 OPB: 100 EBC: 100",
+ "CPU:1066 PLB: 266 OPB: 88 EBC: 88",
NULL
};
@@ -55,6 +57,16 @@ static u8 boot_configs[][17] = {
0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
},
{
+ (NAND_COMPATIBLE | NOR_COMPATIBLE),
+ 0x86, 0x82, 0x96, 0x19, 0xb9, 0x80, 0x00, 0xa0, 0x40, 0x08,
+ 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+ },
+ {
+ (NAND_COMPATIBLE | NOR_COMPATIBLE),
+ 0x86, 0x80, 0xb3, 0x01, 0x9d, 0x80, 0x00, 0xa0, 0x40, 0x08,
+ 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+ },
+ {
0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
}