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author | Wolfgang Denk <wd@denx.de> | 2008-10-21 21:19:35 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-10-21 21:19:35 +0200 |
commit | 06c29422189388f3082c5bab226af17e90d51ee7 (patch) | |
tree | 195737b9980828723081f2e86fad200ad2d49de6 /board/amcc/canyonlands/init.S | |
parent | 055b12f2ffd7c34eea7e983a0588b24f2e69e0e3 (diff) | |
parent | f4d14c55504ce40287321bd63ee269e3233ee4ae (diff) | |
download | u-boot-imx-06c29422189388f3082c5bab226af17e90d51ee7.zip u-boot-imx-06c29422189388f3082c5bab226af17e90d51ee7.tar.gz u-boot-imx-06c29422189388f3082c5bab226af17e90d51ee7.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx
Diffstat (limited to 'board/amcc/canyonlands/init.S')
-rw-r--r-- | board/amcc/canyonlands/init.S | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/board/amcc/canyonlands/init.S b/board/amcc/canyonlands/init.S index 179dd32..694cc89 100644 --- a/board/amcc/canyonlands/init.S +++ b/board/amcc/canyonlands/init.S @@ -77,11 +77,16 @@ tlbtab: /* PCIe UTL register */ tlbentry(CONFIG_SYS_PCIE_BASE, SZ_16K, 0x08010000, 0xC, AC_R|AC_W|SA_G|SA_I) +#if !defined(CONFIG_ARCHES) /* TLB-entry for NAND */ tlbentry(CONFIG_SYS_NAND_ADDR, SZ_16M, CONFIG_SYS_NAND_ADDR, 4, AC_R|AC_W|AC_X|SA_G|SA_I) /* TLB-entry for CPLD */ tlbentry(CONFIG_SYS_BCSR_BASE, SZ_1K, CONFIG_SYS_BCSR_BASE, 4, AC_R|AC_W|SA_G|SA_I) +#else + /* TLB-entry for FPGA */ + tlbentry(CONFIG_SYS_FPGA_BASE, SZ_16M, CONFIG_SYS_FPGA_BASE, 4, AC_R|AC_W|SA_G|SA_I) +#endif /* TLB-entry for OCM */ tlbentry(CONFIG_SYS_OCM_BASE, SZ_16K, 0x00040000, 4, AC_R|AC_W|AC_X|SA_I) @@ -92,6 +97,18 @@ tlbtab: /* AHB: Internal USB Peripherals (USB, SATA) */ tlbentry(CONFIG_SYS_AHB_BASE, SZ_1M, 0xbff00000, 4, AC_R|AC_W|AC_X|SA_G|SA_I) +#if defined(CONFIG_RAPIDIO) + /* TLB-entries for RapidIO (SRIO) */ + tlbentry(CONFIG_SYS_SRGPL0_REG_BAR, SZ_16M, CONFIG_SYS_SRGPL0_REG_BAR, + 0xD, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_SRGPL0_CFG_BAR, SZ_16M, CONFIG_SYS_SRGPL0_CFG_BAR, + 0xD, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_SRGPL0_MNT_BAR, SZ_16M, CONFIG_SYS_SRGPL0_MNT_BAR, + 0xD, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_I2ODMA_BASE, SZ_1K, 0x00100000, + 0x4, AC_R|AC_W|SA_G|SA_I) +#endif + tlbtab_end #if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) |