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| author | Stefan Roese <sr@denx.de> | 2008-03-03 17:27:02 +0100 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2008-03-15 07:28:05 +0100 |
| commit | 71665ebf88408ff2acb762af47989fd4365b321a (patch) | |
| tree | 7b728da4cbaf7b5d31d05315cc28ae33fbcbb183 /board/amcc/canyonlands/bootstrap.c | |
| parent | c813f1f835a7edfdb929f2843b09db72cd5cd2f2 (diff) | |
| download | u-boot-imx-71665ebf88408ff2acb762af47989fd4365b321a.zip u-boot-imx-71665ebf88408ff2acb762af47989fd4365b321a.tar.gz u-boot-imx-71665ebf88408ff2acb762af47989fd4365b321a.tar.bz2 | |
ppc4xx: Add Canyonlands NAND booting support
460EX doesn't support a fixed bootstrap option to boot from 512 byte page
NAND devices. The only bootstrap option for NAND booting is option F for
2k page devices. So to boot from a 512 bype page device, the I2C bootstrap
EEPROM needs to be programmed accordingly.
This patch adds basic NAND booting support for the AMCC Canyonlands aval
board and also adds support to the "bootstrap" command, to enable NAND
booting I2C setting.
Tested with 512 byte page NAND device (32MByte) on Canyonlands.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/amcc/canyonlands/bootstrap.c')
| -rw-r--r-- | board/amcc/canyonlands/bootstrap.c | 23 |
1 files changed, 12 insertions, 11 deletions
diff --git a/board/amcc/canyonlands/bootstrap.c b/board/amcc/canyonlands/bootstrap.c index 3f5822e..37fa1c9 100644 --- a/board/amcc/canyonlands/bootstrap.c +++ b/board/amcc/canyonlands/bootstrap.c @@ -28,7 +28,7 @@ #include <asm/io.h> /* - * NOR and NAND boot options change bytes 6, 7, 8, 9, 11. The + * NOR and NAND boot options change bytes 5, 6, 8, 9, 11. The * values are independent of the rest of the clock settings. */ @@ -45,14 +45,14 @@ static char *config_labels[] = { static u8 boot_configs[][17] = { { - (NOR_COMPATIBLE), + (NAND_COMPATIBLE | NOR_COMPATIBLE), 0x86, 0x80, 0xce, 0x1f, 0x79, 0x80, 0x00, 0xa0, 0x40, 0x08, - 0x23, 0x50, 0x0d, 0x95, 0x00, 0x00 + 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 }, { - (NOR_COMPATIBLE), + (NAND_COMPATIBLE | NOR_COMPATIBLE), 0x86, 0x80, 0xba, 0x14, 0x99, 0x80, 0x00, 0xa0, 0x40, 0x08, - 0x23, 0x50, 0x0d, 0x95, 0x00, 0x00 + 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 }, { 0, @@ -61,10 +61,10 @@ static u8 boot_configs[][17] = { }; /* - * Bytes 6,8,9,11 change for NAND boot + * Bytes 5,6,8,9,11 change for NAND boot */ static u8 nand_boot[] = { - 0xd0, 0xa0, 0x68, 0x58 + 0x90, 0x01, 0xa0, 0x68, 0x58 }; static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) @@ -146,10 +146,11 @@ static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) buf = &boot_configs[x][1]; if (b_nand) { - buf[6] = nand_boot[0]; - buf[8] = nand_boot[1]; - buf[9] = nand_boot[2]; - buf[11] = nand_boot[3]; + buf[5] = nand_boot[0]; + buf[6] = nand_boot[1]; + buf[8] = nand_boot[2]; + buf[9] = nand_boot[3]; + buf[11] = nand_boot[4]; } if (i2c_write(I2C_EEPROM_ADDR, 0, 1, buf, 16) != 0) |