summaryrefslogtreecommitdiff
path: root/board/amcc/bubinga/flash.c
diff options
context:
space:
mode:
authorStefan Roese <sr@denx.de>2009-09-09 16:25:29 +0200
committerStefan Roese <sr@denx.de>2009-09-11 10:35:58 +0200
commitd1c3b27525b664e8c4db6bb173eed51bfc8220de (patch)
treec00f3d0bcfbd5fcc1954cc9cefdbc4c9c41f41ea /board/amcc/bubinga/flash.c
parente7963772eb78a6aa1fa65063d64eab3a8626daac (diff)
downloadu-boot-imx-d1c3b27525b664e8c4db6bb173eed51bfc8220de.zip
u-boot-imx-d1c3b27525b664e8c4db6bb173eed51bfc8220de.tar.gz
u-boot-imx-d1c3b27525b664e8c4db6bb173eed51bfc8220de.tar.bz2
ppc4xx: Big cleanup of PPC4xx defines
This patch cleans up multiple issues of the 4xx register (mostly DCR, SDR, CPR, etc) definitions: - Change lower case defines to upper case (plb4_acr -> PLB4_ACR) - Change the defines to better match the names from the user's manuals (e.g. cprpllc -> CPR0_PLLC) - Removal of some unused defines Please test this patch intensive on your PPC4xx platform. Even though I tried not to break anything and tested successfully on multiple 4xx AMCC platforms, testing on custom platforms is recommended. Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/amcc/bubinga/flash.c')
-rw-r--r--board/amcc/bubinga/flash.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/board/amcc/bubinga/flash.c b/board/amcc/bubinga/flash.c
index a10babb..baf89d5 100644
--- a/board/amcc/bubinga/flash.c
+++ b/board/amcc/bubinga/flash.c
@@ -106,25 +106,25 @@ unsigned long flash_init(void)
/* Re-do sizing to get full correct info */
if (size_b1) {
- mtdcr(ebccfga, pb0cr);
- pbcr = mfdcr(ebccfgd);
- mtdcr(ebccfga, pb0cr);
+ mtdcr(EBC0_CFGADDR, PB0CR);
+ pbcr = mfdcr(EBC0_CFGDATA);
+ mtdcr(EBC0_CFGADDR, PB0CR);
base_b1 = -size_b1;
pbcr = (pbcr & 0x0001ffff) | base_b1 |
(((size_b1 / 1024 / 1024) - 1) << 17);
- mtdcr(ebccfgd, pbcr);
- /* printf("pb1cr = %x\n", pbcr); */
+ mtdcr(EBC0_CFGDATA, pbcr);
+ /* printf("PB1CR = %x\n", pbcr); */
}
if (size_b0) {
- mtdcr(ebccfga, pb1cr);
- pbcr = mfdcr(ebccfgd);
- mtdcr(ebccfga, pb1cr);
+ mtdcr(EBC0_CFGADDR, PB1CR);
+ pbcr = mfdcr(EBC0_CFGDATA);
+ mtdcr(EBC0_CFGADDR, PB1CR);
base_b0 = base_b1 - size_b0;
pbcr = (pbcr & 0x0001ffff) | base_b0 |
(((size_b0 / 1024 / 1024) - 1) << 17);
- mtdcr(ebccfgd, pbcr);
- /* printf("pb0cr = %x\n", pbcr); */
+ mtdcr(EBC0_CFGDATA, pbcr);
+ /* printf("PB0CR = %x\n", pbcr); */
}
size_b0 = flash_get_size((vu_long *) base_b0, &flash_info[0]);