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authorStefan Roese <sr@denx.de>2005-08-11 17:56:56 +0200
committerStefan Roese <sr@denx.de>2005-08-11 17:56:56 +0200
commitc57c7980ffe6e04a99b5f401a663426d7144f392 (patch)
tree95756f84e5ccfb0ce29a0bacd13b96e3764b7b66 /board/amcc/bamboo/flash.c
parenteece159cddc1f64a744c82c4b9582ced45b5c45c (diff)
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Add NAND FLASH support for AMCC Bamboo 440EP eval board
Patch by Stefan Roese, 11 Aug 2005
Diffstat (limited to 'board/amcc/bamboo/flash.c')
-rw-r--r--board/amcc/bamboo/flash.c11
1 files changed, 8 insertions, 3 deletions
diff --git a/board/amcc/bamboo/flash.c b/board/amcc/bamboo/flash.c
index 97a4b98..a30ab7a 100644
--- a/board/amcc/bamboo/flash.c
+++ b/board/amcc/bamboo/flash.c
@@ -50,15 +50,16 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
/*
* Mark big flash bank (16 bit instead of 8 bit access) in address with bit 0
*/
-static unsigned long flash_addr_table[8][CFG_MAX_FLASH_BANKS] = {
+static unsigned long flash_addr_table[][CFG_MAX_FLASH_BANKS] = {
{0x87800001, 0xFFF00000, 0xFFF80000}, /* 0:boot from small flash */
{0x00000000, 0x00000000, 0x00000000}, /* 1:boot from pci 66 */
{0x00000000, 0x00000000, 0x00000000}, /* 2:boot from nand flash */
- {0x87800000, 0x87880000, 0xFF800001}, /* 3:boot from big flash 33*/
- {0x87800000, 0x87880000, 0xFF800001}, /* 4:boot from big flash 66*/
+ {0x87F00000, 0x87F80000, 0xFFC00001}, /* 3:boot from big flash 33*/
+ {0x87F00000, 0x87F80000, 0xFFC00001}, /* 4:boot from big flash 66*/
{0x00000000, 0x00000000, 0x00000000}, /* 5:boot from */
{0x00000000, 0x00000000, 0x00000000}, /* 6:boot from pci 66 */
{0x00000000, 0x00000000, 0x00000000}, /* 7:boot from */
+ {0x87C00001, 0xFFF00000, 0xFFF80000}, /* 0:boot from small flash */
};
/*
@@ -117,6 +118,10 @@ unsigned long flash_init(void)
index = 2;
break;
}
+ } else if (index == 0) {
+ if (in8(FPGA_SETTING_REG) & FPGA_SET_REG_OP_CODE_FLASH_ABOVE) {
+ index = 8; /* sram below op code flash -> new index 8 */
+ }
}
DEBUGF("\n");