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author | Haavard Skinnemoen <hskinnemoen@atmel.com> | 2007-06-19 15:40:01 +0200 |
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committer | Haavard Skinnemoen <hskinnemoen@atmel.com> | 2007-06-19 15:40:01 +0200 |
commit | 448f5fea4c7dd531b69e4e60eed2a72b89b4ed6d (patch) | |
tree | 022599b68a0e72f34f3f152f4a0056b557a06a44 /board/amcc/acadia/memory.c | |
parent | f2134f8e9eb006bdcd729e89f309c07b2fa45180 (diff) | |
parent | 5ffa76a032279bc6d3230b703eda32d13305ba13 (diff) | |
download | u-boot-imx-448f5fea4c7dd531b69e4e60eed2a72b89b4ed6d.zip u-boot-imx-448f5fea4c7dd531b69e4e60eed2a72b89b4ed6d.tar.gz u-boot-imx-448f5fea4c7dd531b69e4e60eed2a72b89b4ed6d.tar.bz2 |
Merge branch 'upstream'
Diffstat (limited to 'board/amcc/acadia/memory.c')
-rw-r--r-- | board/amcc/acadia/memory.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/board/amcc/acadia/memory.c b/board/amcc/acadia/memory.c index 5375d36..25904d3 100644 --- a/board/amcc/acadia/memory.c +++ b/board/amcc/acadia/memory.c @@ -39,6 +39,7 @@ void sdram_init(void) return; } +#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL) static void cram_bcr_write(u32 wr_val) { wr_val <<= 2; @@ -62,9 +63,12 @@ static void cram_bcr_write(u32 wr_val) return; } +#endif long int initdram(int board_type) { +#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL) + int i; u32 val; /* 1. EBC need to program READY, CLK, ADV for ASync mode */ @@ -92,7 +96,12 @@ long int initdram(int board_type) /* Config EBC to use RDY */ mfsdr(sdrultra0, val); - mtsdr(sdrultra0, val | 0x04000000); + mtsdr(sdrultra0, val | SDR_ULTRA0_EBCRDYEN); + + /* Wait a short while, since for NAND booting this is too fast */ + for (i=0; i<200000; i++) + ; +#endif return (CFG_MBYTES_RAM << 20); } |