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authorStefan Roese <sr@denx.de>2007-06-19 16:42:31 +0200
committerStefan Roese <sr@denx.de>2007-06-19 16:42:31 +0200
commitdf8a24cdd30151505cf57bbee5289e91bf53bd1b (patch)
treeff5305f90f000aead5a0cbf3a8e3501ea6102021 /board/amcc/acadia/memory.c
parent86ba99e34194394052d24c04dc40d1263d29a26f (diff)
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[ppc4xx] Fix problem with NAND booting on AMCC Acadia
The latest changes showed a problem with the location of the NAND-SPL image in the OCM and the init-data area (incl. cache). This patch fixes this problem. Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/amcc/acadia/memory.c')
-rw-r--r--board/amcc/acadia/memory.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/board/amcc/acadia/memory.c b/board/amcc/acadia/memory.c
index 25904d3..9346d2c 100644
--- a/board/amcc/acadia/memory.c
+++ b/board/amcc/acadia/memory.c
@@ -31,6 +31,8 @@
#include <asm/io.h>
#include <asm/gpio.h>
+extern void board_pll_init_f(void);
+
/*
* sdram_init - Dummy implementation for start.S, spd_sdram used on this board!
*/
@@ -67,6 +69,15 @@ static void cram_bcr_write(u32 wr_val)
long int initdram(int board_type)
{
+#if defined(CONFIG_NAND_SPL)
+ u32 reg;
+
+ /* don't reinit PLL when booting via I2C bootstrap option */
+ mfsdr(SDR_PINSTP, reg);
+ if (reg != 0xf0000000)
+ board_pll_init_f();
+#endif
+
#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
int i;
u32 val;