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authorStefan Roese <sr@denx.de>2007-04-18 12:07:47 +0200
committerStefan Roese <sr@denx.de>2007-04-18 12:07:47 +0200
commite673226ff9d6aa91b47ceac74b8c13770b06bb37 (patch)
treece741f7df06577694f6122add3304c44f8aef2b7 /board/amcc/acadia/acadia.c
parent90e6f41cf09fc98f6ccb510e183d53ab8546cf2f (diff)
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ppc4xx: Update Acadia to not setup PLL when booting via bootstrap EEPROM
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/amcc/acadia/acadia.c')
-rw-r--r--board/amcc/acadia/acadia.c10
1 files changed, 7 insertions, 3 deletions
diff --git a/board/amcc/acadia/acadia.c b/board/amcc/acadia/acadia.c
index 7d0046a..baf598c 100644
--- a/board/amcc/acadia/acadia.c
+++ b/board/amcc/acadia/acadia.c
@@ -26,7 +26,7 @@
extern void board_pll_init_f(void);
-void liveoak_gpio_init(void)
+static void acadia_gpio_init(void)
{
/*
* GPIO0 setup (select GPIO or alternate function)
@@ -55,8 +55,12 @@ int board_early_init_f(void)
{
unsigned int reg;
- board_pll_init_f();
- liveoak_gpio_init();
+ /* don't reinit PLL when booting via I2C bootstrap option */
+ mfsdr(SDR_PINSTP, reg);
+ if (reg != 0xf0000000)
+ board_pll_init_f();
+
+ acadia_gpio_init();
/* USB Host core needs this bit set */
mfsdr(sdrultra1, reg);