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| author | John Rigby <jrigby@freescale.com> | 2009-01-23 10:33:15 -0700 |
|---|---|---|
| committer | John Rigby <jrigby@freescale.com> | 2009-02-03 09:25:51 -0700 |
| commit | 14d19cd1bce9a24b1335598f1568140f4950e4d9 (patch) | |
| tree | 04baec6c1c5e6dcd83640ad06ce287fe21666d9a /board/ads5121 | |
| parent | 4c154252c480b13f69ce1b71a9530b0515da76a6 (diff) | |
| download | u-boot-imx-14d19cd1bce9a24b1335598f1568140f4950e4d9.zip u-boot-imx-14d19cd1bce9a24b1335598f1568140f4950e4d9.tar.gz u-boot-imx-14d19cd1bce9a24b1335598f1568140f4950e4d9.tar.bz2 | |
ADS5121 Fix rev2 silicon pci iopad config
Reset config is not correct
Signed-off-by: John Rigby <jrigby@freescale.com>
Diffstat (limited to 'board/ads5121')
| -rw-r--r-- | board/ads5121/ads5121.c | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/board/ads5121/ads5121.c b/board/ads5121/ads5121.c index 0610928..8e22719 100644 --- a/board/ads5121/ads5121.c +++ b/board/ads5121/ads5121.c @@ -290,17 +290,28 @@ static iopin_t ioregs_init[] = { } }; +static iopin_t rev2_silicon_pci_ioregs_init[] = { + /* FUNC0=PCI Sets next 54 to PCI pads */ + { + IOCTL_PCI_AD31, 54, 0, + IO_PIN_FMUX(0) | IO_PIN_HOLD(0) | IO_PIN_DS(0) + } +}; + int checkboard (void) { ushort brd_rev = *(vu_short *) (CONFIG_SYS_CPLD_BASE + 0x00); uchar cpld_rev = *(vu_char *) (CONFIG_SYS_CPLD_BASE + 0x02); + volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; printf ("Board: ADS5121 rev. 0x%04x (CPLD rev. 0x%02x)\n", brd_rev, cpld_rev); /* initialize function mux & slew rate IO inter alia on IO Pins */ - iopin_initialize(ioregs_init, sizeof(ioregs_init) / sizeof(ioregs_init[0])); + if (SVR_MJREV (im->sysconf.spridr) >= 2) { + iopin_initialize(rev2_silicon_pci_ioregs_init, 1); + } return 0; } |