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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2008-10-16 15:01:15 +0200
committerWolfgang Denk <wd@denx.de>2008-10-18 21:54:03 +0200
commit6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch)
treeae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /board/adder
parent71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff)
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rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'board/adder')
-rw-r--r--board/adder/adder.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/board/adder/adder.c b/board/adder/adder.c
index e8a5737..87791de 100644
--- a/board/adder/adder.c
+++ b/board/adder/adder.c
@@ -68,7 +68,7 @@ static uint sdram_table[] = {
phys_size_t initdram (int board_type)
{
long int msize;
- volatile immap_t *immap = (volatile immap_t *)CFG_IMMR;
+ volatile immap_t *immap = (volatile immap_t *)CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
upmconfig(UPMA, sdram_table, sizeof(sdram_table) / sizeof(uint));
@@ -76,7 +76,7 @@ phys_size_t initdram (int board_type)
/* Configure SDRAM refresh */
memctl->memc_mptpr = MPTPR_PTP_DIV32; /* BRGCLK/32 */
- memctl->memc_mamr = (94 << 24) | CFG_MAMR; /* No refresh */
+ memctl->memc_mamr = (94 << 24) | CONFIG_SYS_MAMR; /* No refresh */
udelay(200);
/* Run precharge from location 0x15 */
@@ -94,10 +94,10 @@ phys_size_t initdram (int board_type)
udelay(200);
memctl->memc_mamr |= MAMR_PTAE; /* Enable refresh */
- memctl->memc_or1 = ~(CFG_SDRAM_MAX_SIZE - 1) | OR_CSNT_SAM;
- memctl->memc_br1 = CFG_SDRAM_BASE | BR_PS_32 | BR_MS_UPMA | BR_V;
+ memctl->memc_or1 = ~(CONFIG_SYS_SDRAM_MAX_SIZE - 1) | OR_CSNT_SAM;
+ memctl->memc_br1 = CONFIG_SYS_SDRAM_BASE | BR_PS_32 | BR_MS_UPMA | BR_V;
- msize = get_ram_size(CFG_SDRAM_BASE, CFG_SDRAM_MAX_SIZE);
+ msize = get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_SDRAM_MAX_SIZE);
memctl->memc_or1 |= ~(msize - 1);
return msize;