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author | Wolfgang Denk <wd@denx.de> | 2011-06-23 15:37:33 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2011-06-23 15:37:33 +0200 |
commit | 9623c158f6a5150a21c25026bfba79e7ff7912f5 (patch) | |
tree | 2c4d4209a34baa810a6f3fb409e1f8e494f01b31 /board/actux4/actux4.c | |
parent | 2ad6e27dcdbd694de8e3823d2b52b250b1a59219 (diff) | |
parent | 1ed63c549892bc3a4ce1a43f09a6a92a00054f3d (diff) | |
download | u-boot-imx-9623c158f6a5150a21c25026bfba79e7ff7912f5.zip u-boot-imx-9623c158f6a5150a21c25026bfba79e7ff7912f5.tar.gz u-boot-imx-9623c158f6a5150a21c25026bfba79e7ff7912f5.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm:
run arm_pci_init after relocation
IXP42x PCI rewrite
update/fix PDNB3 board
update/fix IXDP425 / IXDPG425 boards
add dvlhost (dLAN 200 AV Wireless G) board
IXP NPE: add support for fixed-speed MII ports
update/fix AcTux4 board
update/fix AcTux3 board
update/fix AcTux2 board
update/fix AcTux1 board
use -ffunction-sections / --gc-sections on IXP42x
support CONFIG_SYS_LDSCRIPT on ARM
fix "depend" target in npe directory
Fix IXP code to work after relocation was added
trigger hardware watchdog in IXP42x serial driver
add support for IXP42x Rev. B1 and newer
add XScale sub architecture (IXP/PXA) to maintainer list
Conflicts:
arch/arm/lib/board.c
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'board/actux4/actux4.c')
-rw-r--r-- | board/actux4/actux4.c | 103 |
1 files changed, 59 insertions, 44 deletions
diff --git a/board/actux4/actux4.c b/board/actux4/actux4.c index f373b58..d20d881 100644 --- a/board/actux4/actux4.c +++ b/board/actux4/actux4.c @@ -35,92 +35,107 @@ #include <command.h> #include <malloc.h> #include <asm/arch/ixp425.h> - +#include <asm/io.h> #include <miiphy.h> +#ifdef CONFIG_PCI +#include <pci.h> +#include <asm/arch/ixp425pci.h> +#endif #include "actux4_hw.h" DECLARE_GLOBAL_DATA_PTR; -int board_init (void) +int board_early_init_f(void) +{ + writel(0xbd113c42, IXP425_EXP_CS1); + return 0; +} + +int board_init(void) { gd->bd->bi_arch_number = MACH_TYPE_ACTUX4; /* adress of boot parameters */ gd->bd->bi_boot_params = 0x00000100; - GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_nPWRON); - GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_nPWRON); + GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_nPWRON); + GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_nPWRON); - GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_IORST); - GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_IORST); + GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST); + GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_IORST); /* led not populated on board*/ - GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_LED3); - GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_LED3); + GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED3); + GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_LED3); /* middle LED */ - GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_LED2); - GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_LED2); + GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED2); + GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_LED2); /* right LED */ /* weak pulldown = LED weak on */ - GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_LED1); - GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_LED1); + GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_LED1); + GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_LED1); /* Setup GPIO's for Interrupt inputs */ - GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_USBINTA); - GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_USBINTB); - GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_USBINTC); - GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_RTCINT); - GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_PCI_INTA); - GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_PCI_INTB); - - GPIO_INT_ACT_LOW_SET (CONFIG_SYS_GPIO_USBINTA); - GPIO_INT_ACT_LOW_SET (CONFIG_SYS_GPIO_USBINTB); - GPIO_INT_ACT_LOW_SET (CONFIG_SYS_GPIO_USBINTC); - GPIO_INT_ACT_LOW_SET (CONFIG_SYS_GPIO_RTCINT); - GPIO_INT_ACT_LOW_SET (CONFIG_SYS_GPIO_PCI_INTA); - GPIO_INT_ACT_LOW_SET (CONFIG_SYS_GPIO_PCI_INTB); + GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_USBINTA); + GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_USBINTB); + GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_USBINTC); + GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_RTCINT); + GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTA); + GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTB); + + GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_USBINTA); + GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_USBINTB); + GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_USBINTC); + GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_RTCINT); + GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTA); + GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTB); /* Setup GPIO's for 33MHz clock output */ - *IXP425_GPIO_GPCLKR = 0x011001FF; - GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_EXTBUS_CLK); - GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_PCI_CLK); - - *IXP425_EXP_CS1 = 0xbd113c42; + writel(0x011001FF, IXP425_GPIO_GPCLKR); + GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK); + GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK); - udelay (10000); - GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_IORST); - udelay (10000); - GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_IORST); - udelay (10000); - GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_IORST); + udelay(10000); + GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST); + udelay(10000); + GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST); + udelay(10000); + GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST); return 0; } /* Check Board Identity */ -int checkboard (void) +int checkboard(void) { - puts ("Board: AcTux-4\n"); - return (0); + puts("Board: AcTux-4\n"); + return 0; } -int dram_init (void) +int dram_init(void) { - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, 128<<20); + return 0; +} - return (0); +#ifdef CONFIG_PCI +struct pci_controller hose; + +void pci_init_board(void) +{ + pci_ixp_init(&hose); } +#endif /* * Hardcoded flash setup: * Flash 0 is a non-CFI SST 39VF020 flash, 8 bit flash / 8 bit bus. * Flash 1 is an Intel *16 flash using the CFI driver. */ -ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t * info) +ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info) { if (banknum == 0) { /* non-CFI boot flash */ info->portwidth = 1; |