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| author | Ajay Bhargav <[ajay.bhargav@einfochips.com]> | 2011-09-13 22:22:04 +0530 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-09-30 22:00:53 +0200 |
| commit | aa0ecfeb9d60d82e095daa0d6271f77b2c25d3fb (patch) | |
| tree | 5d5cf625b2f94bfce0f473b0a31dcad1317e5ba2 /board/Marvell/gplugd/gplugd.c | |
| parent | 79788bb19ac0c68cef77bd92d3365bdf2989339d (diff) | |
| download | u-boot-imx-aa0ecfeb9d60d82e095daa0d6271f77b2c25d3fb.zip u-boot-imx-aa0ecfeb9d60d82e095daa0d6271f77b2c25d3fb.tar.gz u-boot-imx-aa0ecfeb9d60d82e095daa0d6271f77b2c25d3fb.tar.bz2 | |
Armada100: Enable Ethernet support for GplugD
This patch enables ethernet support for Marvell GplugD board. Network
related commands works.
Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
Diffstat (limited to 'board/Marvell/gplugd/gplugd.c')
| -rw-r--r-- | board/Marvell/gplugd/gplugd.c | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/board/Marvell/gplugd/gplugd.c b/board/Marvell/gplugd/gplugd.c index dc7d89d..8560b3f 100644 --- a/board/Marvell/gplugd/gplugd.c +++ b/board/Marvell/gplugd/gplugd.c @@ -33,6 +33,11 @@ #include <asm/arch/mfp.h> #include <asm/arch/armada100.h> +#ifdef CONFIG_ARMADA100_FEC +#include <net.h> +#include <netdev.h> +#endif /* CONFIG_ARMADA100_FEC */ + DECLARE_GLOBAL_DATA_PTR; int board_early_init_f(void) @@ -45,6 +50,26 @@ int board_early_init_f(void) /* Enable Console on UART3 */ MFPO8_UART3_TXD, MFPO9_UART3_RXD, + + /* Ethernet PHY Interface */ + MFP086_ETH_TXCLK, + MFP087_ETH_TXEN, + MFP088_ETH_TXDQ3, + MFP089_ETH_TXDQ2, + MFP090_ETH_TXDQ1, + MFP091_ETH_TXDQ0, + MFP092_ETH_CRS, + MFP093_ETH_COL, + MFP094_ETH_RXCLK, + MFP095_ETH_RXER, + MFP096_ETH_RXDQ3, + MFP097_ETH_RXDQ2, + MFP098_ETH_RXDQ1, + MFP099_ETH_RXDQ0, + MFP100_ETH_MDC, + MFP101_ETH_MDIO, + MFP103_ETH_RXDV, + MFP_EOC /*End of configuration*/ }; /* configure MFP's */ @@ -60,3 +85,16 @@ int board_init(void) gd->bd->bi_boot_params = armd1_sdram_base(0) + 0x100; return 0; } + +#ifdef CONFIG_ARMADA100_FEC +int board_eth_init(bd_t *bis) +{ + struct armd1apmu_registers *apmu_regs = + (struct armd1apmu_registers *)ARMD1_APMU_BASE; + + /* Enable clock of ethernet controller */ + writel(FE_CLK_RST | FE_CLK_ENA, &apmu_regs->fecrc); + + return armada100_fec_register(ARMD1_FEC_BASE); +} +#endif /* CONFIG_ARMADA100_FEC */ |