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| author | Kumar Gala <galak@kernel.crashing.org> | 2008-08-15 08:24:32 -0500 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-08-19 00:57:28 +0200 |
| commit | fcd69a1a57fb2af4d26201422095a4be9f36963e (patch) | |
| tree | dcd7a78e4dffdc7b0d1ad53da21345aa5887ca63 /board/Marvell/db64460 | |
| parent | a15b07104ca7bbb7093c9009c9ae1b58b4202d13 (diff) | |
| download | u-boot-imx-fcd69a1a57fb2af4d26201422095a4be9f36963e.zip u-boot-imx-fcd69a1a57fb2af4d26201422095a4be9f36963e.tar.gz u-boot-imx-fcd69a1a57fb2af4d26201422095a4be9f36963e.tar.bz2 | |
Clean up usage of icache_disable/dcache_disable
There is no point in disabling the icache on 7xx/74xx/86xx parts and not
also flushing the icache. All callers of invalidate_l1_instruction_cache()
call icache_disable() right after. Make it so icache_disable() calls
invalidate_l1_instruction_cache() for us.
Also, dcache_disable() already calls dcache_flush() so there is no point
in the explicit calls of dcache_flush().
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/Marvell/db64460')
| -rw-r--r-- | board/Marvell/db64460/db64460.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/board/Marvell/db64460/db64460.c b/board/Marvell/db64460/db64460.c index a4abf8d..1ae898d 100644 --- a/board/Marvell/db64460/db64460.c +++ b/board/Marvell/db64460/db64460.c @@ -51,9 +51,6 @@ #define DP(x) #endif -extern void flush_data_cache (void); -extern void invalidate_l1_instruction_cache (void); - /* ------------------------------------------------------------------------- */ /* this is the current GT register space location */ @@ -930,7 +927,5 @@ void board_prebootm_init () my_remap_gt_regs_bootm (CFG_GT_REGS, BRIDGE_REG_BASE_BOOTM); icache_disable (); - invalidate_l1_instruction_cache (); - flush_data_cache (); dcache_disable (); } |