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authorWei Ni <wni@nvidia.com>2012-04-02 13:18:58 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-05-15 08:31:38 +0200
commit5aff021c61fffa9f6a58038db98e8dc29598813b (patch)
tree47ba09a16fd2f39a91943a6bb429fc35315a0da4 /board/Marvell/db64360/pci.c
parent67ac5797adb1fad3b027058100cd6fa58c5b6cb6 (diff)
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tegra: Turn off power detect in board init
Tegra core power rail has leakage voltage around 0.2V while system in suspend mode. The source of the leakage should be coming from PMC power detect logic for IO rails power detection. That can be disabled by writing a '0' to PWR_DET_LATCH followed by writing '0' to PWR_DET (APBDEV_PMC_PWR_DET_0). Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'board/Marvell/db64360/pci.c')
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