diff options
| author | Wolfgang Denk <wd@denx.de> | 2014-10-21 15:23:32 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2014-10-27 14:35:55 +0100 |
| commit | 03b004074fb641cffd7d2150505ef8afc13231bf (patch) | |
| tree | 93fe51aab1e2cc78646ddc8c9b5918dac9ed4ea3 /board/Marvell/db64360/64360.h | |
| parent | fc297789a231ded974d6194e74f7a0620fb4553e (diff) | |
| download | u-boot-imx-03b004074fb641cffd7d2150505ef8afc13231bf.zip u-boot-imx-03b004074fb641cffd7d2150505ef8afc13231bf.tar.gz u-boot-imx-03b004074fb641cffd7d2150505ef8afc13231bf.tar.bz2 | |
PowerPC: drop some 74xx_7xx boards and related code
The file board/Marvell/include/mv_gen_reg.h is incompatible with
the GPL (see for example the "MARVELL RESERVES THE RIGHT AT ITS SOLE
DISCRETION TO REQUEST THAT THIS CODE BE IMMEDIATELY RETURNED TO
MARVELL" clause). As this cannot be fixed, we remove the file and all
code that depends on it. Fortunately this only affects some very old
boards that have long reached EOL:
CPCI750
DB64360
DB64460
p3m750
p3m7448
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Roger Meier <r.meier@siemens.com>
Diffstat (limited to 'board/Marvell/db64360/64360.h')
| -rw-r--r-- | board/Marvell/db64360/64360.h | 36 |
1 files changed, 0 insertions, 36 deletions
diff --git a/board/Marvell/db64360/64360.h b/board/Marvell/db64360/64360.h deleted file mode 100644 index 9951262..0000000 --- a/board/Marvell/db64360/64360.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * (C) Copyright 2003 - * Ingo Assmus <ingo.assmus@keymile.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* - * main board support/init for the Galileo Eval board DB64360. - */ - -#ifndef __64360_H__ -#define __64360_H__ - -/* CPU Configuration bits */ -#define CPU_CONF_ADDR_MISS_EN (1 << 8) -#define CPU_CONF_SINGLE_CPU (1 << 11) -#define CPU_CONF_ENDIANESS (1 << 12) -#define CPU_CONF_PIPELINE (1 << 13) -#define CPU_CONF_STOP_RETRY (1 << 17) -#define CPU_CONF_MULTI_DECODE (1 << 18) -#define CPU_CONF_DP_VALID (1 << 19) -#define CPU_CONF_PERR_PROP (1 << 22) -#define CPU_CONF_AACK_DELAY_2 (1 << 25) -#define CPU_CONF_AP_VALID (1 << 26) -#define CPU_CONF_REMAP_WR_DIS (1 << 27) - -/* CPU Master Control bits */ -#define CPU_MAST_CTL_ARB_EN (1 << 8) -#define CPU_MAST_CTL_MASK_BR_1 (1 << 9) -#define CPU_MAST_CTL_M_WR_TRIG (1 << 10) -#define CPU_MAST_CTL_M_RD_TRIG (1 << 11) -#define CPU_MAST_CTL_CLEAN_BLK (1 << 12) -#define CPU_MAST_CTL_FLUSH_BLK (1 << 13) - -#endif /* __64360_H__ */ |