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| author | Markus Klotzbuecher <mk@denx.de> | 2008-10-21 09:18:01 +0200 |
|---|---|---|
| committer | Markus Klotzbuecher <mk@denx.de> | 2008-10-21 09:18:01 +0200 |
| commit | 50bd0057ba8fceeb48533f8b1a652ccd0e170838 (patch) | |
| tree | ea1a183343573c2a48248923b96d316c0956727c /board/MAI/AmigaOneG3SE/i8259.h | |
| parent | 9dbc366744960013965fce8851035b6141f3b3ae (diff) | |
| parent | f82642e33899766892499b163e60560fbbf87773 (diff) | |
| download | u-boot-imx-50bd0057ba8fceeb48533f8b1a652ccd0e170838.zip u-boot-imx-50bd0057ba8fceeb48533f8b1a652ccd0e170838.tar.gz u-boot-imx-50bd0057ba8fceeb48533f8b1a652ccd0e170838.tar.bz2 | |
Merge git://git.denx.de/u-boot into x1
Conflicts:
drivers/usb/usb_ohci.c
Diffstat (limited to 'board/MAI/AmigaOneG3SE/i8259.h')
| -rw-r--r-- | board/MAI/AmigaOneG3SE/i8259.h | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/board/MAI/AmigaOneG3SE/i8259.h b/board/MAI/AmigaOneG3SE/i8259.h index 05c4052..eb08e13 100644 --- a/board/MAI/AmigaOneG3SE/i8259.h +++ b/board/MAI/AmigaOneG3SE/i8259.h @@ -21,20 +21,20 @@ * MA 02111-1307 USA */ -#define ICW1_1 CFG_ISA_IO_BASE_ADDRESS + ISA_INT1_ICW1 -#define ICW1_2 CFG_ISA_IO_BASE_ADDRESS + ISA_INT2_ICW1 -#define ICW2_1 CFG_ISA_IO_BASE_ADDRESS + ISA_INT1_ICW2 -#define ICW2_2 CFG_ISA_IO_BASE_ADDRESS + ISA_INT2_ICW2 -#define ICW3_1 CFG_ISA_IO_BASE_ADDRESS + ISA_INT1_ICW3 -#define ICW3_2 CFG_ISA_IO_BASE_ADDRESS + ISA_INT2_ICW3 -#define ICW4_1 CFG_ISA_IO_BASE_ADDRESS + ISA_INT1_ICW4 -#define ICW4_2 CFG_ISA_IO_BASE_ADDRESS + ISA_INT2_ICW4 -#define OCW1_1 CFG_ISA_IO_BASE_ADDRESS + ISA_INT1_OCW1 -#define OCW1_2 CFG_ISA_IO_BASE_ADDRESS + ISA_INT2_OCW1 -#define OCW2_1 CFG_ISA_IO_BASE_ADDRESS + ISA_INT1_OCW2 -#define OCW2_2 CFG_ISA_IO_BASE_ADDRESS + ISA_INT2_OCW2 -#define OCW3_1 CFG_ISA_IO_BASE_ADDRESS + ISA_INT1_OCW3 -#define OCW3_2 CFG_ISA_IO_BASE_ADDRESS + ISA_INT2_OCW3 +#define ICW1_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT1_ICW1 +#define ICW1_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT2_ICW1 +#define ICW2_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT1_ICW2 +#define ICW2_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT2_ICW2 +#define ICW3_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT1_ICW3 +#define ICW3_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT2_ICW3 +#define ICW4_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT1_ICW4 +#define ICW4_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT2_ICW4 +#define OCW1_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT1_OCW1 +#define OCW1_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT2_OCW1 +#define OCW2_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT1_OCW2 +#define OCW2_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT2_OCW2 +#define OCW3_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT1_OCW3 +#define OCW3_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT2_OCW3 #define IMR_1 OCW1_1 #define IMR_2 OCW1_2 |