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| author | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2008-12-17 16:53:07 +0100 |
|---|---|---|
| committer | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2008-12-17 16:53:07 +0100 |
| commit | cb5473205206c7f14cbb1e747f28ec75b48826e2 (patch) | |
| tree | 8f4808d60917100b18a10b05230f7638a0a9bbcc /board/MAI/AmigaOneG3SE/i8259.h | |
| parent | baf449fc5ff96f071bb0e3789fd3265f6d4fd9a0 (diff) | |
| parent | 92c78a3bbcb2ce508b4bf1c4a1e0940406a024bb (diff) | |
| download | u-boot-imx-cb5473205206c7f14cbb1e747f28ec75b48826e2.zip u-boot-imx-cb5473205206c7f14cbb1e747f28ec75b48826e2.tar.gz u-boot-imx-cb5473205206c7f14cbb1e747f28ec75b48826e2.tar.bz2 | |
Merge branch 'fixes' into cleanups
Conflicts:
board/atmel/atngw100/atngw100.c
board/atmel/atstk1000/atstk1000.c
cpu/at32ap/at32ap700x/gpio.c
include/asm-avr32/arch-at32ap700x/clk.h
include/configs/atngw100.h
include/configs/atstk1002.h
include/configs/atstk1003.h
include/configs/atstk1004.h
include/configs/atstk1006.h
include/configs/favr-32-ezkit.h
include/configs/hammerhead.h
include/configs/mimc200.h
Diffstat (limited to 'board/MAI/AmigaOneG3SE/i8259.h')
| -rw-r--r-- | board/MAI/AmigaOneG3SE/i8259.h | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/board/MAI/AmigaOneG3SE/i8259.h b/board/MAI/AmigaOneG3SE/i8259.h index 05c4052..eb08e13 100644 --- a/board/MAI/AmigaOneG3SE/i8259.h +++ b/board/MAI/AmigaOneG3SE/i8259.h @@ -21,20 +21,20 @@ * MA 02111-1307 USA */ -#define ICW1_1 CFG_ISA_IO_BASE_ADDRESS + ISA_INT1_ICW1 -#define ICW1_2 CFG_ISA_IO_BASE_ADDRESS + ISA_INT2_ICW1 -#define ICW2_1 CFG_ISA_IO_BASE_ADDRESS + ISA_INT1_ICW2 -#define ICW2_2 CFG_ISA_IO_BASE_ADDRESS + ISA_INT2_ICW2 -#define ICW3_1 CFG_ISA_IO_BASE_ADDRESS + ISA_INT1_ICW3 -#define ICW3_2 CFG_ISA_IO_BASE_ADDRESS + ISA_INT2_ICW3 -#define ICW4_1 CFG_ISA_IO_BASE_ADDRESS + ISA_INT1_ICW4 -#define ICW4_2 CFG_ISA_IO_BASE_ADDRESS + ISA_INT2_ICW4 -#define OCW1_1 CFG_ISA_IO_BASE_ADDRESS + ISA_INT1_OCW1 -#define OCW1_2 CFG_ISA_IO_BASE_ADDRESS + ISA_INT2_OCW1 -#define OCW2_1 CFG_ISA_IO_BASE_ADDRESS + ISA_INT1_OCW2 -#define OCW2_2 CFG_ISA_IO_BASE_ADDRESS + ISA_INT2_OCW2 -#define OCW3_1 CFG_ISA_IO_BASE_ADDRESS + ISA_INT1_OCW3 -#define OCW3_2 CFG_ISA_IO_BASE_ADDRESS + ISA_INT2_OCW3 +#define ICW1_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT1_ICW1 +#define ICW1_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT2_ICW1 +#define ICW2_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT1_ICW2 +#define ICW2_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT2_ICW2 +#define ICW3_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT1_ICW3 +#define ICW3_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT2_ICW3 +#define ICW4_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT1_ICW4 +#define ICW4_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT2_ICW4 +#define OCW1_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT1_OCW1 +#define OCW1_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT2_OCW1 +#define OCW2_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT1_OCW2 +#define OCW2_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT2_OCW2 +#define OCW3_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT1_OCW3 +#define OCW3_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT2_OCW3 #define IMR_1 OCW1_1 #define IMR_2 OCW1_2 |