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authorHeiko Schocher <hs@denx.de>2013-11-18 08:07:23 +0100
committerAndreas Bießmann <andreas.devel@googlemail.com>2013-12-01 22:38:52 +0100
commit4535a24c0c06e367bc40c43b4807bdb335513a1a (patch)
tree96299cbb0828cf3d43e8b14984ebf6e97967ea07 /board/BuS/vl_ma2sc
parentc5e8885aab9d282fa480cfa359cf5fd84248abb8 (diff)
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arm926ejs, at91: add common phy_reset function
add common phy reset code into a common function. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Bo Shen <voice.shen@atmel.com> Cc: Jens Scharsig <esw@bus-elektronik.de> Cc: Sergey Lapin <slapin@ossfans.org> Cc: Stelian Pop <stelian@popies.net> Cc: Albin Tonnerre <albin.tonnerre@free-electrons.com> Cc: Eric Benard <eric@eukrea.com> Cc: Markus Hubig <mhubig@imko.de> Acked-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de> Tested-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de> Tested-by: Bo Shen <voice.shen@atmel.com> Acked-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Diffstat (limited to 'board/BuS/vl_ma2sc')
-rw-r--r--board/BuS/vl_ma2sc/vl_ma2sc.c18
1 files changed, 2 insertions, 16 deletions
diff --git a/board/BuS/vl_ma2sc/vl_ma2sc.c b/board/BuS/vl_ma2sc/vl_ma2sc.c
index e2ae6fd..412ff3b 100644
--- a/board/BuS/vl_ma2sc/vl_ma2sc.c
+++ b/board/BuS/vl_ma2sc/vl_ma2sc.c
@@ -16,7 +16,6 @@
#include <asm/arch/at91sam9_smc.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/at91_pio.h>
-#include <asm/arch/at91_rstc.h>
#include <asm/arch/at91sam9263.h>
#include <asm/arch/gpio.h>
#include <asm/arch/at91_common.h>
@@ -76,25 +75,12 @@ static void vl_ma2sc_nand_hw_init(void)
#ifdef CONFIG_MACB
static void vl_ma2sc_macb_hw_init(void)
{
- unsigned long erstl;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
- at91_rstc_t *rstc = (at91_rstc_t *) ATMEL_BASE_RSTC;
+
/* Enable clock */
writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
- erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
-
- /* Need to reset PHY -> 500ms reset */
- writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(0x0D) |
- AT91_RSTC_MR_URSTEN, &rstc->mr);
-
- writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
- /* Wait for end hardware reset */
- while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL))
- ;
-
- /* Restore NRST value */
- writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, &rstc->mr);
+ at91_phy_reset();
at91_macb_hw_init();
}