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| author | Hannes Petermaier <oe5hpm@oevsv.at> | 2015-04-08 07:38:34 +0200 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-04-23 08:52:26 -0400 |
| commit | d79c138c75ba7c4920a4a505d7f7888d9cd7ad89 (patch) | |
| tree | 6912b25db965f5ab5038c6f57d267223ea23d327 /board/BuR/tseries | |
| parent | 47c14227b85eb93fedfa59497326ae0bba0fb407 (diff) | |
| download | u-boot-imx-d79c138c75ba7c4920a4a505d7f7888d9cd7ad89.zip u-boot-imx-d79c138c75ba7c4920a4a505d7f7888d9cd7ad89.tar.gz u-boot-imx-d79c138c75ba7c4920a4a505d7f7888d9cd7ad89.tar.bz2 | |
board/BuR/tseries: reactivate NAND-board
The NAND-version has been become a bit orphan.
Now we need to reactivate it, so bring necessary things:
- loading devicetree
- switch control signal to correct pins
- setup pinmux
- default-environment
up to date.
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
Diffstat (limited to 'board/BuR/tseries')
| -rw-r--r-- | board/BuR/tseries/board.c | 3 | ||||
| -rw-r--r-- | board/BuR/tseries/mux.c | 2 |
2 files changed, 4 insertions, 1 deletions
diff --git a/board/BuR/tseries/board.c b/board/BuR/tseries/board.c index 89e989f..d1d698e 100644 --- a/board/BuR/tseries/board.c +++ b/board/BuR/tseries/board.c @@ -128,6 +128,9 @@ void am33xx_spl_board_init(void) i2c_set_bus_num(0); i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); pmicsetup(0); + + gpio_direction_output(64+29, 1); /* switch NAND_RnB to GPMC_WAIT1 */ + gpio_direction_output(64+28, 1); /* switch MII2_CRS to GPMC_WAIT0 */ } const struct dpll_params *get_dpll_ddr_params(void) diff --git a/board/BuR/tseries/mux.c b/board/BuR/tseries/mux.c index ac7e885..caedf00 100644 --- a/board/BuR/tseries/mux.c +++ b/board/BuR/tseries/mux.c @@ -123,7 +123,7 @@ static struct module_pin_mux nand_pin_mux[] = { {OFFSET(gpmc_ad5), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD5 */ {OFFSET(gpmc_ad6), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD6 */ {OFFSET(gpmc_ad7), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD7 */ - {OFFSET(gpmc_wait0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* NAND WAIT */ + {OFFSET(gpmc_clk), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* NAND WAIT */ {OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN | RXACTIVE)}, /* NAND_WPN */ {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */ {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */ |