diff options
author | Stephen Warren <swarren@nvidia.com> | 2016-06-03 13:05:11 -0600 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2016-06-03 15:14:11 -0400 |
commit | b2f1858455e99a91aeafe59ac73c6c047106d5e8 (patch) | |
tree | 5744d4812e427d526bb55290c49b1d27d82c8251 /arch | |
parent | edb697cfcc2dda02c5b2a34b3157b8fa8fc01264 (diff) | |
download | u-boot-imx-b2f1858455e99a91aeafe59ac73c6c047106d5e8.zip u-boot-imx-b2f1858455e99a91aeafe59ac73c6c047106d5e8.tar.gz u-boot-imx-b2f1858455e99a91aeafe59ac73c6c047106d5e8.tar.bz2 |
arm: lib: fix push/pop-section directives
With the existing code, function symbols are defined in .text, and the
body is defined in .text.xxx. This causes (at least some version of) the
linker not to emit the function body into the final binary, since it's
part of a different section to the symbols being referenced. This of
course causes a wide variety of failures.
This change moves the push/pop-section directives before the function
symbols, and after any relate ENDPROC macro invocations, so that symbols
and bodies are all in the "pushed" sections, and thus the function bodies
are emitted into the binary.
This solves (at least) the boot problems currently seen on Tegra systems
that use SPL (i.e. all ARMv7 Tegras).
Fixes: 13b0a91a6d48 ("arm: lib: Split asm symbols into different .text subsections")
Cc: Marek Vasut <marex@denx.de>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/lib/ashldi3.S | 4 | ||||
-rw-r--r-- | arch/arm/lib/ashrdi3.S | 4 | ||||
-rw-r--r-- | arch/arm/lib/div64.S | 4 | ||||
-rw-r--r-- | arch/arm/lib/lib1funcs.S | 44 | ||||
-rw-r--r-- | arch/arm/lib/lshrdi3.S | 4 | ||||
-rw-r--r-- | arch/arm/lib/muldi3.S | 4 | ||||
-rw-r--r-- | arch/arm/lib/uldivmod.S | 4 |
7 files changed, 34 insertions, 34 deletions
diff --git a/arch/arm/lib/ashldi3.S b/arch/arm/lib/ashldi3.S index 6c9ae91..e9ec890 100644 --- a/arch/arm/lib/ashldi3.S +++ b/arch/arm/lib/ashldi3.S @@ -15,9 +15,9 @@ #define ah r1 #endif +.pushsection .text.__ashldi3, "ax" ENTRY(__ashldi3) ENTRY(__aeabi_llsl) -.pushsection .text.__ashldi3, "ax" subs r3, r2, #32 rsb ip, r2, #32 @@ -29,6 +29,6 @@ ENTRY(__aeabi_llsl) mov al, al, lsl r2 ret lr -.popsection ENDPROC(__ashldi3) ENDPROC(__aeabi_llsl) +.popsection diff --git a/arch/arm/lib/ashrdi3.S b/arch/arm/lib/ashrdi3.S index 3eb59ec..6e15774 100644 --- a/arch/arm/lib/ashrdi3.S +++ b/arch/arm/lib/ashrdi3.S @@ -15,9 +15,9 @@ #define ah r1 #endif +.pushsection .text.__ashrdi3, "ax" ENTRY(__ashrdi3) ENTRY(__aeabi_lasr) -.pushsection .text.__ashrdi3, "ax" subs r3, r2, #32 rsb ip, r2, #32 @@ -29,6 +29,6 @@ ENTRY(__aeabi_lasr) mov ah, ah, asr r2 ret lr -.popsection ENDPROC(__ashrdi3) ENDPROC(__aeabi_lasr) +.popsection diff --git a/arch/arm/lib/div64.S b/arch/arm/lib/div64.S index 5bfb41d..b417db2 100644 --- a/arch/arm/lib/div64.S +++ b/arch/arm/lib/div64.S @@ -45,9 +45,9 @@ * Clobbered regs: xl, ip */ +.pushsection .text.__do_div64, "ax" ENTRY(__do_div64) UNWIND(.fnstart) -.pushsection .text.__do_div64, "ax" @ Test for easy paths first. subs ip, r4, #1 @@ -193,7 +193,6 @@ UNWIND(.fnstart) moveq yh, xh moveq xh, #0 reteq lr -.popsection UNWIND(.fnend) UNWIND(.fnstart) @@ -212,3 +211,4 @@ Ldiv0_64: UNWIND(.fnend) ENDPROC(__do_div64) +.popsection diff --git a/arch/arm/lib/lib1funcs.S b/arch/arm/lib/lib1funcs.S index f1becda..9bf93ce 100644 --- a/arch/arm/lib/lib1funcs.S +++ b/arch/arm/lib/lib1funcs.S @@ -193,10 +193,10 @@ .endm +.pushsection .text.__udivsi3, "ax" ENTRY(__udivsi3) ENTRY(__aeabi_uidiv) UNWIND(.fnstart) -.pushsection .text.__udivsi3, "ax" subs r2, r1, #1 reteq lr @@ -220,14 +220,14 @@ UNWIND(.fnstart) mov r0, r0, lsr r2 ret lr -.popsection UNWIND(.fnend) ENDPROC(__udivsi3) ENDPROC(__aeabi_uidiv) +.popsection +.pushsection .text.__umodsi3, "ax" ENTRY(__umodsi3) UNWIND(.fnstart) -.pushsection .text.__umodsi3, "ax" subs r2, r1, #1 @ compare divisor with 1 bcc Ldiv0 @@ -241,14 +241,14 @@ UNWIND(.fnstart) ret lr -.popsection UNWIND(.fnend) ENDPROC(__umodsi3) +.popsection +.pushsection .text.__divsi3, "ax" ENTRY(__divsi3) ENTRY(__aeabi_idiv) UNWIND(.fnstart) -.pushsection .text.__divsi3, "ax" cmp r1, #0 eor ip, r0, r1 @ save the sign of the result. @@ -285,14 +285,14 @@ UNWIND(.fnstart) rsbmi r0, r0, #0 ret lr -.popsection UNWIND(.fnend) ENDPROC(__divsi3) ENDPROC(__aeabi_idiv) +.popsection +.pushsection .text.__modsi3, "ax" ENTRY(__modsi3) UNWIND(.fnstart) -.pushsection .text.__modsi3, "ax" cmp r1, #0 beq Ldiv0 @@ -312,16 +312,16 @@ UNWIND(.fnstart) rsbmi r0, r0, #0 ret lr -.popsection UNWIND(.fnend) ENDPROC(__modsi3) +.popsection #ifdef CONFIG_AEABI +.pushsection .text.__aeabi_uidivmod, "ax" ENTRY(__aeabi_uidivmod) UNWIND(.fnstart) UNWIND(.save {r0, r1, ip, lr} ) -.pushsection .text.__aeabi_uidivmod, "ax" stmfd sp!, {r0, r1, ip, lr} bl __aeabi_uidiv @@ -330,14 +330,14 @@ UNWIND(.save {r0, r1, ip, lr} ) sub r1, r1, r3 ret lr -.popsection UNWIND(.fnend) ENDPROC(__aeabi_uidivmod) +.popsection +.pushsection .text.__aeabi_uidivmod, "ax" ENTRY(__aeabi_idivmod) UNWIND(.fnstart) UNWIND(.save {r0, r1, ip, lr} ) -.pushsection .text.__aeabi_uidivmod, "ax" stmfd sp!, {r0, r1, ip, lr} bl __aeabi_idiv @@ -346,31 +346,31 @@ UNWIND(.save {r0, r1, ip, lr} ) sub r1, r1, r3 ret lr -.popsection UNWIND(.fnend) ENDPROC(__aeabi_idivmod) +.popsection #endif +.pushsection .text.Ldiv0, "ax" Ldiv0: UNWIND(.fnstart) UNWIND(.pad #4) UNWIND(.save {lr}) -.pushsection .text.Ldiv0, "ax" str lr, [sp, #-8]! bl __div0 mov r0, #0 @ About as wrong as it could be. ldr pc, [sp], #8 -.popsection UNWIND(.fnend) ENDPROC(Ldiv0) +.popsection +.pushsection .text.__gnu_thumb1_case_sqi, "ax" /* Thumb-1 specialities */ #if defined(CONFIG_SYS_THUMB_BUILD) && !defined(CONFIG_HAS_THUMB2) ENTRY(__gnu_thumb1_case_sqi) -.pushsection .text.__gnu_thumb1_case_sqi, "ax" push {r1} mov r1, lr lsrs r1, r1, #1 @@ -380,11 +380,11 @@ ENTRY(__gnu_thumb1_case_sqi) add lr, lr, r1 pop {r1} bx lr -.popsection ENDPROC(__gnu_thumb1_case_sqi) +.popsection +_.pushsection .text.__gnu_thumb1_case_uqi, "ax" ENTRY(__gnu_thumb1_case_uqi) -.pushsection .text.__gnu_thumb1_case_uqi, "ax" push {r1} mov r1, lr lsrs r1, r1, #1 @@ -394,11 +394,11 @@ ENTRY(__gnu_thumb1_case_uqi) add lr, lr, r1 pop {r1} bx lr -.popsection ENDPROC(__gnu_thumb1_case_uqi) +.popsection -ENTRY(__gnu_thumb1_case_shi) .pushsection .text.__gnu_thumb1_case_shi, "ax" +ENTRY(__gnu_thumb1_case_shi) push {r0, r1} mov r1, lr lsrs r1, r1, #1 @@ -409,11 +409,11 @@ ENTRY(__gnu_thumb1_case_shi) add lr, lr, r1 pop {r0, r1} bx lr -.popsection ENDPROC(__gnu_thumb1_case_shi) +.popsection -ENTRY(__gnu_thumb1_case_uhi) .pushsection .text.__gnu_thumb1_case_uhi, "ax" +ENTRY(__gnu_thumb1_case_uhi) push {r0, r1} mov r1, lr lsrs r1, r1, #1 @@ -424,6 +424,6 @@ ENTRY(__gnu_thumb1_case_uhi) add lr, lr, r1 pop {r0, r1} bx lr -.popsection ENDPROC(__gnu_thumb1_case_uhi) +.popsection #endif diff --git a/arch/arm/lib/lshrdi3.S b/arch/arm/lib/lshrdi3.S index f710ccb..ead33e5 100644 --- a/arch/arm/lib/lshrdi3.S +++ b/arch/arm/lib/lshrdi3.S @@ -15,9 +15,9 @@ #define ah r1 #endif +.pushsection .text.__lshldi3, "ax" ENTRY(__lshrdi3) ENTRY(__aeabi_llsr) -.pushsection .text.__lshldi3, "ax" subs r3, r2, #32 rsb ip, r2, #32 @@ -29,6 +29,6 @@ ENTRY(__aeabi_llsr) mov ah, ah, lsr r2 ret lr -.popsection ENDPROC(__lshrdi3) ENDPROC(__aeabi_llsr) +.popsection diff --git a/arch/arm/lib/muldi3.S b/arch/arm/lib/muldi3.S index bc255c5..d7c93e7 100644 --- a/arch/arm/lib/muldi3.S +++ b/arch/arm/lib/muldi3.S @@ -23,9 +23,9 @@ #define yh r3 #endif +.pushsection .text.__muldi3, "ax" ENTRY(__muldi3) ENTRY(__aeabi_lmul) -.pushsection .text.__muldi3, "ax" mul xh, yl, xh mla xh, xl, yh, xh @@ -43,6 +43,6 @@ ENTRY(__aeabi_lmul) adc xh, xh, ip, lsr #16 ret lr -.popsection ENDPROC(__muldi3) ENDPROC(__aeabi_lmul) +.popsection diff --git a/arch/arm/lib/uldivmod.S b/arch/arm/lib/uldivmod.S index bbc44c6..7246996 100644 --- a/arch/arm/lib/uldivmod.S +++ b/arch/arm/lib/uldivmod.S @@ -33,8 +33,8 @@ THUMB( TMP .req r8 ) -ENTRY(__aeabi_uldivmod) .pushsection .text.__aeabi_uldivmod, "ax" +ENTRY(__aeabi_uldivmod) stmfd sp!, {r4, r5, r6, r7, THUMB(TMP,) lr} @ Test if B == 0 @@ -242,5 +242,5 @@ L_div_by_0: mov R_0, #0 mov R_1, #0 ldmfd sp!, {r4, r5, r6, r7, THUMB(TMP,) pc} -.popsection ENDPROC(__aeabi_uldivmod) +.popsection |