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authorKim Phillips <kim.phillips@freescale.com>2010-06-01 12:24:27 -0500
committerKumar Gala <galak@kernel.crashing.org>2010-07-16 10:55:07 -0500
commit929a213830612579e2413297ead6353615a64dc2 (patch)
treec72d82cf3377be95723383c24e5d880280c95b05 /arch
parent5d0c3b57b2c6dc58c4626b036b1cc767619b19f4 (diff)
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powerpc/8xxx: Distinguish between incompatible SEC h/w types
CONFIG_SYS_FSL_SEC_COMPAT is set to 2 for the SEC 2.x and SEC 3.x. Parts with newer SEC h/w versions will increment the number to accomodate incompatible code changes. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/cpu/mpc8xxx/fdt.c6
-rw-r--r--arch/powerpc/include/asm/config.h7
2 files changed, 10 insertions, 3 deletions
diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c
index 79d3cdf..d0e06e2 100644
--- a/arch/powerpc/cpu/mpc8xxx/fdt.c
+++ b/arch/powerpc/cpu/mpc8xxx/fdt.c
@@ -97,11 +97,11 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd)
}
#endif /* CONFIG_HAS_FSL_DR_USB */
-#if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx)
/*
* update crypto node properties to a specified revision of the SEC
- * called with sec_rev == 0 if not on an mpc8xxxE processor
+ * called with sec_rev == 0 if not on an E processor
*/
+#if CONFIG_SYS_FSL_SEC_COMPAT == 2 /* SEC 2.x/3.x */
void fdt_fixup_crypto_node(void *blob, int sec_rev)
{
const struct sec_rev_prop {
@@ -183,4 +183,4 @@ void fdt_fixup_crypto_node(void *blob, int sec_rev)
printf("WARNING: could not set crypto property: %s\n",
fdt_strerror(err));
}
-#endif /* defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) */
+#endif
diff --git a/arch/powerpc/include/asm/config.h b/arch/powerpc/include/asm/config.h
index fc3facb..1c61784 100644
--- a/arch/powerpc/include/asm/config.h
+++ b/arch/powerpc/include/asm/config.h
@@ -66,6 +66,13 @@
#define CONFIG_TSECV2
#endif
+/*
+ * SEC (crypto unit) major compatible version determination
+ */
+#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC83xx)
+#define CONFIG_SYS_FSL_SEC_COMPAT 2
+#endif
+
/* Number of TLB CAM entries we have on FSL Book-E chips */
#if defined(CONFIG_E500MC)
#define CONFIG_SYS_NUM_TLBCAMS 64