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| author | Aneesh V <aneesh@ti.com> | 2011-08-16 04:33:05 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-09-04 11:36:16 +0200 |
| commit | cba4b1809f043bf85c806e5a4e342f62bd5ded45 (patch) | |
| tree | 69a063b972d4ac839666a9b2c79203843d63936c /arch | |
| parent | 98a48c5de545e5a5eedba0a868024ef0d4ae5347 (diff) | |
| download | u-boot-imx-cba4b1809f043bf85c806e5a4e342f62bd5ded45.zip u-boot-imx-cba4b1809f043bf85c806e5a4e342f62bd5ded45.tar.gz u-boot-imx-cba4b1809f043bf85c806e5a4e342f62bd5ded45.tar.bz2 | |
arm: do not force d-cache enable on all boards
c2dd0d45540397704de9b13287417d21049d34c6 added dcache_enable()
to board_init_r(). This enables d-cache for all ARM boards.
As a result some of the arm boards that are not cache-ready
are broken. Revert this change and allow platform code to
take the decision on d-cache enabling.
Also add some documentation for cache usage in ARM.
Signed-off-by: Aneesh V <aneesh@ti.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/lib/board.c | 8 | ||||
| -rw-r--r-- | arch/arm/lib/cache.c | 12 |
2 files changed, 15 insertions, 5 deletions
diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c index c899839..a7fb251 100644 --- a/arch/arm/lib/board.c +++ b/arch/arm/lib/board.c @@ -452,11 +452,9 @@ void board_init_r(gd_t *id, ulong dest_addr) gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */ monitor_flash_len = _end_ofs; - /* - * Enable D$: - * I$, if needed, must be already enabled in start.S - */ - dcache_enable(); + + /* Enable caches */ + enable_caches(); debug("monitor flash len: %08lX\n", monitor_flash_len); board_init(); /* Setup chipselects */ diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c index 92b61a2..b545fb7 100644 --- a/arch/arm/lib/cache.c +++ b/arch/arm/lib/cache.c @@ -53,3 +53,15 @@ void __flush_dcache_all(void) } void flush_dcache_all(void) __attribute__((weak, alias("__flush_dcache_all"))); + + +/* + * Default implementation of enable_caches() + * Real implementation should be in platform code + */ +void __enable_caches(void) +{ + puts("WARNING: Caches not enabled\n"); +} +void enable_caches(void) + __attribute__((weak, alias("__enable_caches"))); |