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author | Chander Kashyap <chander.kashyap@linaro.org> | 2011-04-18 00:08:43 +0000 |
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committer | Minkyu Kang <mk7.kang@samsung.com> | 2011-05-26 19:30:06 +0900 |
commit | 898ddf0a36855e462d7dbe0331b403829ad6a11a (patch) | |
tree | 1778852b16f3fce7d1ea8bc8e21367c32ff88e74 /arch | |
parent | d0b375f647423c8e666ff130597c4f28672e4d79 (diff) | |
download | u-boot-imx-898ddf0a36855e462d7dbe0331b403829ad6a11a.zip u-boot-imx-898ddf0a36855e462d7dbe0331b403829ad6a11a.tar.gz u-boot-imx-898ddf0a36855e462d7dbe0331b403829ad6a11a.tar.bz2 |
S5P: GPIO Macro Values Corrected.
S5PC2XX: Macro values for Pull Up and Driver Strength were wrong.
S5PC1XX: Macro values for Driver Strength were wrong.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/include/asm/arch-s5pc1xx/gpio.h | 4 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-s5pc2xx/gpio.h | 7 |
2 files changed, 5 insertions, 6 deletions
diff --git a/arch/arm/include/asm/arch-s5pc1xx/gpio.h b/arch/arm/include/asm/arch-s5pc1xx/gpio.h index 2df33a6..485b9bf 100644 --- a/arch/arm/include/asm/arch-s5pc1xx/gpio.h +++ b/arch/arm/include/asm/arch-s5pc1xx/gpio.h @@ -149,8 +149,8 @@ void gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode); /* Drive Strength level */ #define GPIO_DRV_1X 0x0 -#define GPIO_DRV_2X 0x1 -#define GPIO_DRV_3X 0x2 +#define GPIO_DRV_3X 0x1 +#define GPIO_DRV_2X 0x2 #define GPIO_DRV_4X 0x3 #define GPIO_DRV_FAST 0x0 #define GPIO_DRV_SLOW 0x1 diff --git a/arch/arm/include/asm/arch-s5pc2xx/gpio.h b/arch/arm/include/asm/arch-s5pc2xx/gpio.h index 05e5b3e..38303e4 100644 --- a/arch/arm/include/asm/arch-s5pc2xx/gpio.h +++ b/arch/arm/include/asm/arch-s5pc2xx/gpio.h @@ -99,14 +99,13 @@ void gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode); /* Pull mode */ #define GPIO_PULL_NONE 0x0 #define GPIO_PULL_DOWN 0x1 -#define GPIO_PULL_UP 0x2 +#define GPIO_PULL_UP 0x3 /* Drive Strength level */ #define GPIO_DRV_1X 0x0 -#define GPIO_DRV_2X 0x1 -#define GPIO_DRV_3X 0x2 +#define GPIO_DRV_3X 0x1 +#define GPIO_DRV_2X 0x2 #define GPIO_DRV_4X 0x3 #define GPIO_DRV_FAST 0x0 #define GPIO_DRV_SLOW 0x1 - #endif |