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| author | Christian Riesch <christian.riesch@omicron.at> | 2011-10-12 21:26:43 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-11-03 22:56:23 +0100 |
| commit | fab19c142edfe39cf62d4c15a973c7c9952bb45e (patch) | |
| tree | 5ec18bdf099319a95d74893cd763e278be6ec201 /arch | |
| parent | eb40d05fcc741f6a526a226c2c3a836e3cf45b7e (diff) | |
| download | u-boot-imx-fab19c142edfe39cf62d4c15a973c7c9952bb45e.zip u-boot-imx-fab19c142edfe39cf62d4c15a973c7c9952bb45e.tar.gz u-boot-imx-fab19c142edfe39cf62d4c15a973c7c9952bb45e.tar.bz2 | |
arm, davinci: Add function lpsc_syncreset()
This patch adds a function lpsc_syncreset that allows setting a
lpsc module into Sync Reset state.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/cpu/arm926ejs/davinci/psc.c | 20 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-davinci/hardware.h | 2 |
2 files changed, 17 insertions, 5 deletions
diff --git a/arch/arm/cpu/arm926ejs/davinci/psc.c b/arch/arm/cpu/arm926ejs/davinci/psc.c index 707fa47..3e92518 100644 --- a/arch/arm/cpu/arm926ejs/davinci/psc.c +++ b/arch/arm/cpu/arm926ejs/davinci/psc.c @@ -46,7 +46,7 @@ */ /* Works on Always On power domain only (no PD argument) */ -void lpsc_on(unsigned int id) +static void lpsc_transition(unsigned int id, unsigned int state) { dv_reg_p mdstat, mdctl, ptstat, ptcmd; #ifdef CONFIG_SOC_DA8XX @@ -83,10 +83,10 @@ void lpsc_on(unsigned int id) while (readl(ptstat) & 0x01) continue; - if ((readl(mdstat) & PSC_MDSTAT_STATE) == 0x03) - return; /* Already on and enabled */ + if ((readl(mdstat) & PSC_MDSTAT_STATE) == state) + return; /* Already in that state */ - writel(readl(mdctl) | 0x03, mdctl); + writel((readl(mdctl) & ~PSC_MDCTL_NEXT) | state, mdctl); switch (id) { #ifdef CONFIG_SOC_DM644X @@ -114,10 +114,20 @@ void lpsc_on(unsigned int id) while (readl(ptstat) & 0x01) continue; - while ((readl(mdstat) & PSC_MDSTAT_STATE) != 0x03) + while ((readl(mdstat) & PSC_MDSTAT_STATE) != state) continue; } +void lpsc_on(unsigned int id) +{ + lpsc_transition(id, 0x03); +} + +void lpsc_syncreset(unsigned int id) +{ + lpsc_transition(id, 0x01); +} + /* Not all DaVinci chips have a DSP power domain. */ #ifdef CONFIG_SOC_DM644X diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h index 431e87b..9699892 100644 --- a/arch/arm/include/asm/arch-davinci/hardware.h +++ b/arch/arm/include/asm/arch-davinci/hardware.h @@ -292,6 +292,7 @@ typedef volatile unsigned int * dv_reg_p; #endif /* CONFIG_SOC_DA8XX */ void lpsc_on(unsigned int id); +void lpsc_syncreset(unsigned int id); void dsp_on(void); void davinci_enable_uart0(void); @@ -358,6 +359,7 @@ struct davinci_psc_regs { #endif /* CONFIG_SOC_DA8XX */ #define PSC_MDSTAT_STATE 0x3f +#define PSC_MDCTL_NEXT 0x07 #ifndef CONFIG_SOC_DA8XX |