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author | Tom Rini <trini@konsulko.com> | 2015-06-15 08:31:11 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2015-06-15 10:57:29 -0400 |
commit | b48b69ba10fd1fd1f0de73220438ba8052fc2a33 (patch) | |
tree | 2f1ca8d47c05a054c098bddb5482e198437d0de1 /arch | |
parent | 08520bf5e4da36ec4a190e7234cac3e7641dc6d5 (diff) | |
parent | 1c0df9ef6ed03baf6fd325dac546290f80c7fd09 (diff) | |
download | u-boot-imx-b48b69ba10fd1fd1f0de73220438ba8052fc2a33.zip u-boot-imx-b48b69ba10fd1fd1f0de73220438ba8052fc2a33.tar.gz u-boot-imx-b48b69ba10fd1fd1f0de73220438ba8052fc2a33.tar.bz2 |
Merge git://git.denx.de/u-boot-marvell
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-mvebu/cpu.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c index 04681fc..0121db8 100644 --- a/arch/arm/mach-mvebu/cpu.c +++ b/arch/arm/mach-mvebu/cpu.c @@ -7,6 +7,7 @@ #include <common.h> #include <netdev.h> #include <asm/io.h> +#include <asm/pl310.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> @@ -160,10 +161,17 @@ static void update_sdram_window_sizes(void) } #ifdef CONFIG_ARCH_CPU_INIT +static void set_cbar(u32 addr) +{ + asm("mcr p15, 4, %0, c15, c0" : : "r" (addr)); +} + + int arch_cpu_init(void) { /* Linux expects the internal registers to be at 0xf1000000 */ writel(SOC_REGS_PHY_BASE, INTREG_BASE_ADDR_REG); + set_cbar(SOC_REGS_PHY_BASE + 0xC000); /* * We need to call mvebu_mbus_probe() before calling @@ -240,6 +248,13 @@ int cpu_eth_init(bd_t *bis) #ifndef CONFIG_SYS_DCACHE_OFF void enable_caches(void) { + struct pl310_regs *const pl310 = + (struct pl310_regs *)CONFIG_SYS_PL310_BASE; + + /* First disable L2 cache - may still be enable from BootROM */ + if (mvebu_soc_family() == MVEBU_SOC_A38X) + clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); + /* Avoid problem with e.g. neta ethernet driver */ invalidate_dcache_all(); |