diff options
| author | Simon Glass <sjg@chromium.org> | 2016-03-11 22:06:54 -0700 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2016-03-17 10:27:24 +0800 |
| commit | 9e66506d33eac67bfa814ccba1c9ccd06bb5b107 (patch) | |
| tree | bf644c80aeea878f4274e214620ff03902304310 /arch | |
| parent | 1223d737a38dab7f05e7d62a3c931e28aa1e1495 (diff) | |
| download | u-boot-imx-9e66506d33eac67bfa814ccba1c9ccd06bb5b107.zip u-boot-imx-9e66506d33eac67bfa814ccba1c9ccd06bb5b107.tar.gz u-boot-imx-9e66506d33eac67bfa814ccba1c9ccd06bb5b107.tar.bz2 | |
x86: Move microcode code to a common location
This code is used on several Intel CPUs. Move it into a common location.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/x86/cpu/intel_common/Makefile | 3 | ||||
| -rw-r--r-- | arch/x86/cpu/intel_common/car.S | 2 | ||||
| -rw-r--r-- | arch/x86/cpu/intel_common/microcode.c (renamed from arch/x86/cpu/ivybridge/microcode_intel.c) | 4 | ||||
| -rw-r--r-- | arch/x86/cpu/ivybridge/Makefile | 1 | ||||
| -rw-r--r-- | arch/x86/cpu/ivybridge/cpu.c | 2 | ||||
| -rw-r--r-- | arch/x86/include/asm/microcode.h (renamed from arch/x86/include/asm/arch-ivybridge/microcode.h) | 0 |
6 files changed, 8 insertions, 4 deletions
diff --git a/arch/x86/cpu/intel_common/Makefile b/arch/x86/cpu/intel_common/Makefile index 5dd9573..ca4e171 100644 --- a/arch/x86/cpu/intel_common/Makefile +++ b/arch/x86/cpu/intel_common/Makefile @@ -5,3 +5,6 @@ # obj-$(CONFIG_HAVE_MRC) += car.o +ifndef CONFIG_TARGET_EFI +obj-y += microcode.o +endif diff --git a/arch/x86/cpu/intel_common/car.S b/arch/x86/cpu/intel_common/car.S index 1defabf..81ac976 100644 --- a/arch/x86/cpu/intel_common/car.S +++ b/arch/x86/cpu/intel_common/car.S @@ -12,12 +12,12 @@ */ #include <common.h> +#include <asm/microcode.h> #include <asm/msr-index.h> #include <asm/mtrr.h> #include <asm/post.h> #include <asm/processor.h> #include <asm/processor-flags.h> -#include <asm/arch/microcode.h> #define MTRR_PHYS_BASE_MSR(reg) (0x200 + 2 * (reg)) #define MTRR_PHYS_MASK_MSR(reg) (0x200 + 2 * (reg) + 1) diff --git a/arch/x86/cpu/ivybridge/microcode_intel.c b/arch/x86/cpu/intel_common/microcode.c index 2440a97..3054fab 100644 --- a/arch/x86/cpu/ivybridge/microcode_intel.c +++ b/arch/x86/cpu/intel_common/microcode.c @@ -12,10 +12,12 @@ #include <fdtdec.h> #include <libfdt.h> #include <asm/cpu.h> +#include <asm/microcode.h> #include <asm/msr.h> #include <asm/msr-index.h> #include <asm/processor.h> -#include <asm/arch/microcode.h> + +DECLARE_GLOBAL_DATA_PTR; /** * struct microcode_update - standard microcode header from Intel diff --git a/arch/x86/cpu/ivybridge/Makefile b/arch/x86/cpu/ivybridge/Makefile index b117f0d..78006f1 100644 --- a/arch/x86/cpu/ivybridge/Makefile +++ b/arch/x86/cpu/ivybridge/Makefile @@ -13,7 +13,6 @@ obj-y += gma.o obj-y += lpc.o obj-y += me_status.o obj-y += model_206ax.o -obj-y += microcode_intel.o obj-y += northbridge.o obj-y += report_platform.o obj-y += sata.o diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c index 5d839a7..f0e733b 100644 --- a/arch/x86/cpu/ivybridge/cpu.c +++ b/arch/x86/cpu/ivybridge/cpu.c @@ -19,13 +19,13 @@ #include <asm/cpu.h> #include <asm/io.h> #include <asm/lapic.h> +#include <asm/microcode.h> #include <asm/msr.h> #include <asm/mtrr.h> #include <asm/pci.h> #include <asm/post.h> #include <asm/processor.h> #include <asm/arch/model_206ax.h> -#include <asm/arch/microcode.h> #include <asm/arch/pch.h> #include <asm/arch/sandybridge.h> diff --git a/arch/x86/include/asm/arch-ivybridge/microcode.h b/arch/x86/include/asm/microcode.h index 67f32cc..67f32cc 100644 --- a/arch/x86/include/asm/arch-ivybridge/microcode.h +++ b/arch/x86/include/asm/microcode.h |