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author | Fabio Estevam <fabio.estevam@freescale.com> | 2013-05-03 04:37:10 +0000 |
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committer | Stefano Babic <sbabic@denx.de> | 2013-05-05 17:08:46 +0200 |
commit | 8a47c997c57271222bf71e8c9f5a2fac4109a0bd (patch) | |
tree | 8c1e142536a7b42f1784f73eea910f1a5f1e6e3a /arch | |
parent | 83284a1a6ee451cef80658583db1a346fa844a67 (diff) | |
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mxs: spl_mem_init: Fix comment about start bit
Start bit is part of HW_DRAM_CTL8 register, so fix the comment.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c index 4950490..300da0a 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c @@ -267,7 +267,7 @@ static void mx23_mem_init(void) initialize_dram_values(); - /* Set START bit in DRAM_CTL16 */ + /* Set START bit in DRAM_CTL8 */ setbits_le32(MXS_DRAM_BASE + 0x20, 1 << 16); clrbits_le32(MXS_DRAM_BASE + 0x40, 1 << 17); |