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author | Simon Glass <sjg@chromium.org> | 2013-02-28 19:26:11 +0000 |
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committer | Simon Glass <sjg@chromium.org> | 2013-03-04 15:57:34 -0800 |
commit | 8937140957eb91060b766781bb3a9e2b191529a5 (patch) | |
tree | 820ce6c24bfd60d95f36c19d0d296642d5d78e53 /arch | |
parent | 5e98947f9baa5bdc9b819d365f9f8ef65a9b1e4d (diff) | |
download | u-boot-imx-8937140957eb91060b766781bb3a9e2b191529a5.zip u-boot-imx-8937140957eb91060b766781bb3a9e2b191529a5.tar.gz u-boot-imx-8937140957eb91060b766781bb3a9e2b191529a5.tar.bz2 |
x86: Add basic cache operations
At present most x86 cache operations are undefined. Add a basic
implementation for these.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/x86/cpu/cpu.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c index 6a23974..1a2f85c 100644 --- a/arch/x86/cpu/cpu.c +++ b/arch/x86/cpu/cpu.c @@ -228,3 +228,26 @@ void flush_dcache_range(unsigned long start, unsigned long stop) void invalidate_dcache_range(unsigned long start, unsigned long stop) { } + +void dcache_enable(void) +{ + enable_caches(); +} + +void dcache_disable(void) +{ + disable_caches(); +} + +void icache_enable(void) +{ +} + +void icache_disable(void) +{ +} + +int icache_status(void) +{ + return 1; +} |