ARM: uniphier: refactor SBC init code

There is a bunch of duplication in the System Bus Controller init
code.  Roughly, there are two types in the SBC mode:  Adress/Data
Multiplex Mode and Save Pins Mode.  Consolidate per-SoC functions
into the two, plus per-SoC optional init code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

14 files changed, 105 insertions, 145 deletions

diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h
index e969fd0..cef9d62 100644
--- a/arch/arm/mach-uniphier/init.h
+++ b/arch/arm/mach-uniphier/init.h
@@ -34,27 +34,33 @@ int ph1_pro5_init(const struct uniphier_board_data *bd);
 int proxstream2_init(const struct uniphier_board_data *bd);
 
 #if defined(CONFIG_MICRO_SUPPORT_CARD)
-int ph1_sld3_sbc_init(const struct uniphier_board_data *bd);
-int ph1_ld4_sbc_init(const struct uniphier_board_data *bd);
-int ph1_pro4_sbc_init(const struct uniphier_board_data *bd);
-int proxstream2_sbc_init(const struct uniphier_board_data *bd);
+int sbc_admulti_init(const struct uniphier_board_data *bd);
+int sbc_savepin_init(const struct uniphier_board_data *bd);
+int uniphier_sld3_sbc_init(const struct uniphier_board_data *bd);
+int uniphier_ld4_sbc_init(const struct uniphier_board_data *bd);
+int uniphier_pxs2_sbc_init(const struct uniphier_board_data *bd);
 #else
-static inline int ph1_sld3_sbc_init(const struct uniphier_board_data *bd)
+static inline int sbc_admulti_init(const struct uniphier_board_data *bd)
 {
 	return 0;
 }
 
-static inline int ph1_ld4_sbc_init(const struct uniphier_board_data *bd)
+static inline int sbc_savepin_init(const struct uniphier_board_data *bd)
 {
 	return 0;
 }
 
-static inline int ph1_pro4_sbc_init(const struct uniphier_board_data *bd)
+static inline int uniphier_sld3_sbc_init(const struct uniphier_board_data *bd)
 {
 	return 0;
 }
 
-static inline int proxstream2_sbc_init(const struct uniphier_board_data *bd)
+static inline int uniphier_ld4_sbc_init(const struct uniphier_board_data *bd)
+{
+	return 0;
+}
+
+static inline int uniphier_pxs2_sbc_init(const struct uniphier_board_data *bd)
 {
 	return 0;
 }
diff --git a/arch/arm/mach-uniphier/init/init-ld4.c b/arch/arm/mach-uniphier/init/init-ld4.c
index a9c6d72..5295cd0 100644
--- a/arch/arm/mach-uniphier/init/init-ld4.c
+++ b/arch/arm/mach-uniphier/init/init-ld4.c
@@ -14,7 +14,8 @@ int ph1_ld4_init(const struct uniphier_board_data *bd)
 {
 	ph1_ld4_bcu_init(bd);
 
-	ph1_ld4_sbc_init(bd);
+	sbc_savepin_init(bd);
+	uniphier_ld4_sbc_init(bd);
 
 	support_card_reset();
 
diff --git a/arch/arm/mach-uniphier/init/init-pro4.c b/arch/arm/mach-uniphier/init/init-pro4.c
index 6fcd8b6..456fb48 100644
--- a/arch/arm/mach-uniphier/init/init-pro4.c
+++ b/arch/arm/mach-uniphier/init/init-pro4.c
@@ -12,7 +12,7 @@
 
 int ph1_pro4_init(const struct uniphier_board_data *bd)
 {
-	ph1_pro4_sbc_init(bd);
+	sbc_savepin_init(bd);
 
 	support_card_reset();
 
diff --git a/arch/arm/mach-uniphier/init/init-pro5.c b/arch/arm/mach-uniphier/init/init-pro5.c
index 45c65cf..c2c6803 100644
--- a/arch/arm/mach-uniphier/init/init-pro5.c
+++ b/arch/arm/mach-uniphier/init/init-pro5.c
@@ -12,7 +12,7 @@
 
 int ph1_pro5_init(const struct uniphier_board_data *bd)
 {
-	ph1_pro4_sbc_init(bd);
+	sbc_savepin_init(bd);
 
 	support_card_reset();
 
diff --git a/arch/arm/mach-uniphier/init/init-pxs2.c b/arch/arm/mach-uniphier/init/init-pxs2.c
index 029c544..2d4b6fb 100644
--- a/arch/arm/mach-uniphier/init/init-pxs2.c
+++ b/arch/arm/mach-uniphier/init/init-pxs2.c
@@ -14,7 +14,8 @@ int proxstream2_init(const struct uniphier_board_data *bd)
 {
 	int ret;
 
-	proxstream2_sbc_init(bd);
+	sbc_savepin_init(bd);
+	uniphier_pxs2_sbc_init(bd);
 
 	support_card_reset();
 
diff --git a/arch/arm/mach-uniphier/init/init-sld3.c b/arch/arm/mach-uniphier/init/init-sld3.c
index 7827ec0..c48126f 100644
--- a/arch/arm/mach-uniphier/init/init-sld3.c
+++ b/arch/arm/mach-uniphier/init/init-sld3.c
@@ -14,7 +14,8 @@ int ph1_sld3_init(const struct uniphier_board_data *bd)
 {
 	ph1_sld3_bcu_init(bd);
 
-	ph1_sld3_sbc_init(bd);
+	sbc_admulti_init(bd);
+	uniphier_sld3_sbc_init(bd);
 
 	support_card_reset();
 
diff --git a/arch/arm/mach-uniphier/init/init-sld8.c b/arch/arm/mach-uniphier/init/init-sld8.c
index 6c96aed..1f31ca6 100644
--- a/arch/arm/mach-uniphier/init/init-sld8.c
+++ b/arch/arm/mach-uniphier/init/init-sld8.c
@@ -14,7 +14,8 @@ int ph1_sld8_init(const struct uniphier_board_data *bd)
 {
 	ph1_ld4_bcu_init(bd);
 
-	ph1_ld4_sbc_init(bd);
+	sbc_savepin_init(bd);
+	uniphier_ld4_sbc_init(bd);
 
 	support_card_reset();
 
diff --git a/arch/arm/mach-uniphier/sbc/Makefile b/arch/arm/mach-uniphier/sbc/Makefile
index 87220a6..e515af9 100644
--- a/arch/arm/mach-uniphier/sbc/Makefile
+++ b/arch/arm/mach-uniphier/sbc/Makefile
@@ -2,10 +2,10 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-obj-$(CONFIG_ARCH_UNIPHIER_SLD3)	+= sbc-sld3.o
-obj-$(CONFIG_ARCH_UNIPHIER_LD4)		+= sbc-ld4.o
-obj-$(CONFIG_ARCH_UNIPHIER_PRO4)	+= sbc-pro4.o
-obj-$(CONFIG_ARCH_UNIPHIER_SLD8)	+= sbc-ld4.o
-obj-$(CONFIG_ARCH_UNIPHIER_PRO5)	+= sbc-pro4.o
-obj-$(CONFIG_ARCH_UNIPHIER_PXS2)	+= sbc-pxs2.o
-obj-$(CONFIG_ARCH_UNIPHIER_LD6B)	+= sbc-pxs2.o
+obj-$(CONFIG_ARCH_UNIPHIER_SLD3)	+= sbc-admulti.o sbc-sld3.o
+obj-$(CONFIG_ARCH_UNIPHIER_LD4)		+= sbc-savepin.o sbc-ld4.o
+obj-$(CONFIG_ARCH_UNIPHIER_PRO4)	+= sbc-savepin.o
+obj-$(CONFIG_ARCH_UNIPHIER_SLD8)	+= sbc-savepin.o sbc-ld4.o
+obj-$(CONFIG_ARCH_UNIPHIER_PRO5)	+= sbc-savepin.o
+obj-$(CONFIG_ARCH_UNIPHIER_PXS2)	+= sbc-savepin.o sbc-pxs2.o
+obj-$(CONFIG_ARCH_UNIPHIER_LD6B)	+= sbc-savepin.o sbc-pxs2.o
diff --git a/arch/arm/mach-uniphier/sbc/sbc-pro4.c b/arch/arm/mach-uniphier/sbc/sbc-admulti.c
index 8313c5a..8e9f8eb 100644
--- a/arch/arm/mach-uniphier/sbc/sbc-pro4.c
+++ b/arch/arm/mach-uniphier/sbc/sbc-admulti.c
@@ -11,16 +11,23 @@
 #include "../sg-regs.h"
 #include "sbc-regs.h"
 
-int ph1_pro4_sbc_init(const struct uniphier_board_data *bd)
+#define SBCTRL0_ADMULTIPLX_PERI_VALUE	0x33120000
+#define SBCTRL1_ADMULTIPLX_PERI_VALUE	0x03005500
+#define SBCTRL2_ADMULTIPLX_PERI_VALUE	0x14000020
+
+#define SBCTRL0_ADMULTIPLX_MEM_VALUE	0x33120000
+#define SBCTRL1_ADMULTIPLX_MEM_VALUE	0x03005500
+#define SBCTRL2_ADMULTIPLX_MEM_VALUE	0x14000010
+
+int sbc_admulti_init(const struct uniphier_board_data *bd)
 {
 	/*
 	 * Only CS1 is connected to support card.
 	 * BKSZ[1:0] should be set to "01".
 	 */
-	writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10);
-	writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11);
-	writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12);
-	writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14);
+	writel(SBCTRL0_ADMULTIPLX_MEM_VALUE, SBCTRL10);
+	writel(SBCTRL1_ADMULTIPLX_MEM_VALUE, SBCTRL11);
+	writel(SBCTRL2_ADMULTIPLX_MEM_VALUE, SBCTRL12);
 
 	if (boot_is_swapped()) {
 		/*
diff --git a/arch/arm/mach-uniphier/sbc/sbc-ld4.c b/arch/arm/mach-uniphier/sbc/sbc-ld4.c
index fcce43c..12bee79 100644
--- a/arch/arm/mach-uniphier/sbc/sbc-ld4.c
+++ b/arch/arm/mach-uniphier/sbc/sbc-ld4.c
@@ -1,17 +1,15 @@
 /*
- * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2011-2016 Masahiro Yamada <yamada.masahiro@socionext.com>
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#include <common.h>
 #include <linux/io.h>
 
 #include "../init.h"
-#include "../sg-regs.h"
 #include "sbc-regs.h"
 
-int ph1_ld4_sbc_init(const struct uniphier_board_data *bd)
+int uniphier_ld4_sbc_init(const struct uniphier_board_data *bd)
 {
 	u32 tmp;
 
@@ -20,34 +18,5 @@ int ph1_ld4_sbc_init(const struct uniphier_board_data *bd)
 	tmp &= 0xfffffcff;
 	writel(tmp, PC0CTRL);
 
-	/*
-	 * Only CS1 is connected to support card.
-	 * BKSZ[1:0] should be set to "01".
-	 */
-	writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10);
-	writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11);
-	writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12);
-	writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14);
-
-	if (boot_is_swapped()) {
-		/*
-		 * Boot Swap On: boot from external NOR/SRAM
-		 * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff.
-		 *
-		 * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank
-		 * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals
-		 */
-		writel(0x0000bc01, SBBASE0);
-	} else {
-		/*
-		 * Boot Swap Off: boot from mask ROM
-		 * 0x40000000-0x41ffffff: mask ROM
-		 * 0x42000000-0x43efffff: memory bank (31MB)
-		 * 0x43f00000-0x43ffffff: peripherals (1MB)
-		 */
-		writel(0x0000be01, SBBASE0); /* dummy */
-		writel(0x0200be01, SBBASE1);
-	}
-
 	return 0;
 }
diff --git a/arch/arm/mach-uniphier/sbc/sbc-pxs2.c b/arch/arm/mach-uniphier/sbc/sbc-pxs2.c
index 0d9ffe1..acbf4c5 100644
--- a/arch/arm/mach-uniphier/sbc/sbc-pxs2.c
+++ b/arch/arm/mach-uniphier/sbc/sbc-pxs2.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2015-2016 Masahiro Yamada <yamada.masahiro@socionext.com>
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
@@ -7,43 +7,13 @@
 #include <linux/io.h>
 
 #include "../init.h"
-#include "../sg-regs.h"
 #include "sbc-regs.h"
 
-int proxstream2_sbc_init(const struct uniphier_board_data *bd)
+int uniphier_pxs2_sbc_init(const struct uniphier_board_data *bd)
 {
 	/* necessary for ROM boot ?? */
 	/* system bus output enable */
 	writel(0x17, PC0CTRL);
 
-	/*
-	 * Only CS1 is connected to support card.
-	 * BKSZ[1:0] should be set to "01".
-	 */
-	writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10);
-	writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11);
-	writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12);
-	writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14);
-
-	if (boot_is_swapped()) {
-		/*
-		 * Boot Swap On: boot from external NOR/SRAM
-		 * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff.
-		 *
-		 * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank
-		 * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals
-		 */
-		writel(0x0000bc01, SBBASE0);
-	} else {
-		/*
-		 * Boot Swap Off: boot from mask ROM
-		 * 0x40000000-0x41ffffff: mask ROM
-		 * 0x42000000-0x43efffff: memory bank (31MB)
-		 * 0x43f00000-0x43ffffff: peripherals (1MB)
-		 */
-		writel(0x0000be01, SBBASE0); /* dummy */
-		writel(0x0200be01, SBBASE1);
-	}
-
 	return 0;
 }
diff --git a/arch/arm/mach-uniphier/sbc/sbc-regs.h b/arch/arm/mach-uniphier/sbc/sbc-regs.h
index 493363b..a5dca74 100644
--- a/arch/arm/mach-uniphier/sbc/sbc-regs.h
+++ b/arch/arm/mach-uniphier/sbc/sbc-regs.h
@@ -74,27 +74,6 @@
 #define	SBCTRL73		SBCTRL(7, 3)
 #define	SBCTRL74		(SBCTRL_BASE + 0x170)
 
-/* slower but LED works */
-#define SBCTRL0_SAVEPIN_PERI_VALUE	0x55450000
-#define SBCTRL1_SAVEPIN_PERI_VALUE	0x07168d00
-#define SBCTRL2_SAVEPIN_PERI_VALUE	0x34000009
-#define SBCTRL4_SAVEPIN_PERI_VALUE	0x02110110
-
-/* faster but LED does not work */
-#define SBCTRL0_SAVEPIN_MEM_VALUE	0x55450000
-#define SBCTRL1_SAVEPIN_MEM_VALUE	0x06057700
-/* NOR flash needs more wait counts than SRAM */
-#define SBCTRL2_SAVEPIN_MEM_VALUE	0x34000009
-#define SBCTRL4_SAVEPIN_MEM_VALUE	0x02110210
-
-#define SBCTRL0_ADMULTIPLX_PERI_VALUE	0x33120000
-#define SBCTRL1_ADMULTIPLX_PERI_VALUE	0x03005500
-#define SBCTRL2_ADMULTIPLX_PERI_VALUE	0x14000020
-
-#define SBCTRL0_ADMULTIPLX_MEM_VALUE	0x33120000
-#define SBCTRL1_ADMULTIPLX_MEM_VALUE	0x03005500
-#define SBCTRL2_ADMULTIPLX_MEM_VALUE	0x14000010
-
 #define PC0CTRL				0x598000c0
 #define ROM_BOOT_ROMRSV2		0x59801208
 
diff --git a/arch/arm/mach-uniphier/sbc/sbc-savepin.c b/arch/arm/mach-uniphier/sbc/sbc-savepin.c
new file mode 100644
index 0000000..e3e3daa
--- /dev/null
+++ b/arch/arm/mach-uniphier/sbc/sbc-savepin.c
@@ -0,0 +1,57 @@
+/*
+ * Copyright (C) 2011-2016 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <linux/io.h>
+
+#include "../init.h"
+#include "sbc-regs.h"
+
+/* slower but LED works */
+#define SBCTRL0_SAVEPIN_PERI_VALUE	0x55450000
+#define SBCTRL1_SAVEPIN_PERI_VALUE	0x07168d00
+#define SBCTRL2_SAVEPIN_PERI_VALUE	0x34000009
+#define SBCTRL4_SAVEPIN_PERI_VALUE	0x02110110
+
+/* faster but LED does not work */
+#define SBCTRL0_SAVEPIN_MEM_VALUE	0x55450000
+#define SBCTRL1_SAVEPIN_MEM_VALUE	0x06057700
+/* NOR flash needs more wait counts than SRAM */
+#define SBCTRL2_SAVEPIN_MEM_VALUE	0x34000009
+#define SBCTRL4_SAVEPIN_MEM_VALUE	0x02110210
+
+int sbc_savepin_init(const struct uniphier_board_data *bd)
+{
+	/*
+	 * Only CS1 is connected to support card.
+	 * BKSZ[1:0] should be set to "01".
+	 */
+	writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10);
+	writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11);
+	writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12);
+	writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14);
+
+	if (boot_is_swapped()) {
+		/*
+		 * Boot Swap On: boot from external NOR/SRAM
+		 * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff.
+		 *
+		 * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank
+		 * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals
+		 */
+		writel(0x0000bc01, SBBASE0);
+	} else {
+		/*
+		 * Boot Swap Off: boot from mask ROM
+		 * 0x40000000-0x41ffffff: mask ROM
+		 * 0x42000000-0x43efffff: memory bank (31MB)
+		 * 0x43f00000-0x43ffffff: peripherals (1MB)
+		 */
+		writel(0x0000be01, SBBASE0); /* dummy */
+		writel(0x0200be01, SBBASE1);
+	}
+
+	return 0;
+}
diff --git a/arch/arm/mach-uniphier/sbc/sbc-sld3.c b/arch/arm/mach-uniphier/sbc/sbc-sld3.c
index c03c284..ac9d030 100644
--- a/arch/arm/mach-uniphier/sbc/sbc-sld3.c
+++ b/arch/arm/mach-uniphier/sbc/sbc-sld3.c
@@ -4,45 +4,13 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#include <common.h>
 #include <linux/io.h>
 
 #include "../init.h"
 #include "../sg-regs.h"
-#include "sbc-regs.h"
 
-int ph1_sld3_sbc_init(const struct uniphier_board_data *bd)
+int uniphier_sld3_sbc_init(const struct uniphier_board_data *bd)
 {
-	/* only address/data multiplex mode is supported */
-
-	/*
-	 * Only CS1 is connected to support card.
-	 * BKSZ[1:0] should be set to "01".
-	 */
-	writel(SBCTRL0_ADMULTIPLX_MEM_VALUE, SBCTRL10);
-	writel(SBCTRL1_ADMULTIPLX_MEM_VALUE, SBCTRL11);
-	writel(SBCTRL2_ADMULTIPLX_MEM_VALUE, SBCTRL12);
-
-	if (boot_is_swapped()) {
-		/*
-		 * Boot Swap On: boot from external NOR/SRAM
-		 * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff.
-		 *
-		 * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank
-		 * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals
-		 */
-		writel(0x0000bc01, SBBASE0);
-	} else {
-		/*
-		 * Boot Swap Off: boot from mask ROM
-		 * 0x40000000-0x41ffffff: mask ROM
-		 * 0x42000000-0x43efffff: memory bank (31MB)
-		 * 0x43f00000-0x43ffffff: peripherals (1MB)
-		 */
-		writel(0x0000be01, SBBASE0); /* dummy */
-		writel(0x0200be01, SBBASE1);
-	}
-
 	sg_set_pinsel(99, 1, 4, 4);	/* GPIO26 -> EA24 */
 
 	return 0;