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author | Stephen Warren <swarren@nvidia.com> | 2016-04-28 12:45:44 -0600 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2016-05-06 10:10:05 -0400 |
commit | 116611937faab3a0b2adf4db612aeb4cf1391941 (patch) | |
tree | ee62598b45824cc1b50170e8f7a2d5ce9c57e027 /arch | |
parent | 1cc0a9f49657734c54939f03fc1e3ca0ec9d7eef (diff) | |
download | u-boot-imx-116611937faab3a0b2adf4db612aeb4cf1391941.zip u-boot-imx-116611937faab3a0b2adf4db612aeb4cf1391941.tar.gz u-boot-imx-116611937faab3a0b2adf4db612aeb4cf1391941.tar.bz2 |
ARM: fix ifdefs in ARMv8 lowlevel_init()
Commit 724219a65f55 "ARM: always perform per-CPU GIC init" removed some
ifdefs to unify the MULTIENTRY-vs-non-MULTIENTRY paths. However, the
wrong endif was removed. This patch adds back that missing endif, and
adds a new ifdef to match the endif the now-correctly-terminated block
used to match against. Use "git show -U25 724219a65f55" to see enough
context to make the original issue clear.
In practical terms, this makes no difference to runtime behaviour. The
code that was incorrectly compiled into the binary when ifndef MULTIENTRY
is a no-op for other cases, since branch_if_master evaluates to a hard-
coded jump. The only issues were:
- A few extra instructions were added to the binary.
- The comment on the endif at the very end of the function, indicating
which ifdef it matched, were wrong.
An alternative might be to simply fix the comment on that trailing ifdef,
but that only addresses the second point above, not the first.
Fixes: 724219a65f55 ("ARM: always perform per-CPU GIC init")
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/cpu/armv8/start.S | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index deb44a8..c3cc819 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -214,7 +214,9 @@ WEAK(lowlevel_init) ldr x1, =GICC_BASE bl gic_init_secure_percpu #endif +#endif +#ifndef CONFIG_ARMV8_MULTIENTRY branch_if_master x0, x1, 2f /* |