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authorShengzhou Liu <Shengzhou.Liu@nxp.com>2016-11-21 11:36:48 +0800
committerYork Sun <york.sun@nxp.com>2016-12-05 08:31:45 -0800
commit02fb2761576be8096ebf1b3f961a2cdb21b422ae (patch)
tree70cd556e7498ef63f2d51519958cfc2994c73950 /arch
parent5a17b8b5dab8973089b7400d05f8503d56f29370 (diff)
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fsl/ddr: Add erratum_a009942_check_cpo and clean related erratum
- add additional function erratum_a009942_check_cpo to check if the board needs tuning CPO calibration for optimal setting. - move ERRATUM_A009942(with revision to check cpo_sample option) from fsl_ddr_gen4.c to ctrl_regs.c for reuse on all DDR4/DDR3 parts. - move ERRATUM_A008378 from fsl_ddr_gen4.c to ctrl_regs.c - remove obsolete ERRATUM_A004934 which is replaced with ERRATUM_A009942. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> [YS: Replaced CONFIG_QEMU_E500 with CONFIG_ARCH_QEMU_E500] Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/cpu.c7
-rw-r--r--arch/powerpc/cpu/mpc85xx/cpu_init.c8
-rw-r--r--arch/powerpc/include/asm/config_mpc85xx.h2
3 files changed, 13 insertions, 4 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index d6ee546..ffbbd72 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -26,6 +26,9 @@
#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
#include <asm/armv8/sec_firmware.h>
#endif
+#ifdef CONFIG_SYS_FSL_DDR
+#include <fsl_ddr.h>
+#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -403,7 +406,9 @@ int arch_early_init_r(void)
#ifdef CONFIG_SYS_FSL_ERRATUM_A009635
erratum_a009635();
#endif
-
+#if defined(CONFIG_SYS_FSL_ERRATUM_A009942) && defined(CONFIG_SYS_FSL_DDR)
+ erratum_a009942_check_cpo();
+#endif
#ifdef CONFIG_MP
#if defined(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) && defined(CONFIG_ARMV8_PSCI)
/* Check the psci version to determine if the psci is supported */
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index c2402a8..d1b6699 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -45,7 +45,9 @@
#include <nand.h>
#include <errno.h>
#endif
-
+#ifndef CONFIG_ARCH_QEMU_E500
+#include <fsl_ddr.h>
+#endif
#include "../../../../drivers/block/fsl_sata.h"
#ifdef CONFIG_U_QE
#include <fsl_qe.h>
@@ -947,6 +949,10 @@ int cpu_init_r(void)
#endif /* CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE */
+#ifdef CONFIG_SYS_FSL_ERRATUM_A009942
+ erratum_a009942_check_cpo();
+#endif
+
#ifdef CONFIG_FMAN_ENET
fman_enet_init();
#endif
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index 4877b75..603d6ae 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -512,7 +512,6 @@
#define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
#define CONFIG_SYS_FSL_ERRATUM_A004468
-#define CONFIG_SYS_FSL_ERRATUM_A_004934
#define CONFIG_SYS_FSL_ERRATUM_A005871
#define CONFIG_SYS_FSL_ERRATUM_A006379
#define CONFIG_SYS_FSL_ERRATUM_A007186
@@ -549,7 +548,6 @@
#define CONFIG_SYS_FSL_TBCLK_DIV 16
#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4"
#define CONFIG_SYS_FSL_USB1_PHY_ENABLE
-#define CONFIG_SYS_FSL_ERRATUM_A_004934
#define CONFIG_SYS_FSL_ERRATUM_A005871
#define CONFIG_SYS_FSL_ERRATUM_A006379
#define CONFIG_SYS_FSL_ERRATUM_A007186