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authorBo Shen <voice.shen@atmel.com>2014-08-06 17:24:55 +0800
committerAndreas Bießmann <andreas.devel@googlemail.com>2014-09-19 00:11:19 +0200
commitabe307ddb87f542c841c6b389d7e53bb4de945f0 (patch)
tree9e2957d2c2299506d55be229064adc001adb514f /arch
parentb24c1a10b53e831b28da6a69911061a28b34bbd6 (diff)
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ARM: atmel: add pcr related definition
Using CPU_HAS_PCR micro to present the SoC has pcr (peripheral control register). Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/include/asm/arch-at91/at91_pmc.h2
-rw-r--r--arch/arm/include/asm/arch-at91/sama5d3.h1
2 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-at91/at91_pmc.h b/arch/arm/include/asm/arch-at91/at91_pmc.h
index bef5793..27331ff 100644
--- a/arch/arm/include/asm/arch-at91/at91_pmc.h
+++ b/arch/arm/include/asm/arch-at91/at91_pmc.h
@@ -54,7 +54,7 @@ typedef struct at91_pmc {
u32 reserved5[21];
u32 wpmr; /* 0xE4 Write Protect Mode Register (CAP0) */
u32 wpsr; /* 0xE8 Write Protect Status Register (CAP0) */
-#ifdef CONFIG_SAMA5D3
+#ifdef CPU_HAS_PCR
u32 reserved6[8];
u32 pcer1; /* 0x100 Periperial Clock Enable Register 1 */
u32 pcdr1; /* 0x104 Periperial Clock Disable Register 1 */
diff --git a/arch/arm/include/asm/arch-at91/sama5d3.h b/arch/arm/include/asm/arch-at91/sama5d3.h
index 6d936f4..f7bc4ad 100644
--- a/arch/arm/include/asm/arch-at91/sama5d3.h
+++ b/arch/arm/include/asm/arch-at91/sama5d3.h
@@ -188,6 +188,7 @@
#define ATMEL_PIO_PORTS 5
#define CPU_HAS_PIO3
#define PIO_SCDR_DIV 0x3fff
+#define CPU_HAS_PCR
/*
* PMECC table in ROM