Merge branch 'master' of git://git.denx.de/u-boot-nand-flash

13 files changed, 15 insertions, 442 deletions

diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h
index 71bed4e..d9f0306 100644
--- a/arch/arm/include/asm/arch-am33xx/cpu.h
+++ b/arch/arm/include/asm/arch-am33xx/cpu.h
@@ -78,58 +78,7 @@
 
 #ifndef __KERNEL_STRICT_NAMES
 #ifndef __ASSEMBLY__
-struct gpmc_cs {
-	u32 config1;		/* 0x00 */
-	u32 config2;		/* 0x04 */
-	u32 config3;		/* 0x08 */
-	u32 config4;		/* 0x0C */
-	u32 config5;		/* 0x10 */
-	u32 config6;		/* 0x14 */
-	u32 config7;		/* 0x18 */
-	u32 nand_cmd;		/* 0x1C */
-	u32 nand_adr;		/* 0x20 */
-	u32 nand_dat;		/* 0x24 */
-	u8 res[8];		/* blow up to 0x30 byte */
-};
-
-struct bch_res_0_3 {
-	u32 bch_result_x[4];
-};
-
-struct gpmc {
-	u8 res1[0x10];
-	u32 sysconfig;		/* 0x10 */
-	u8 res2[0x4];
-	u32 irqstatus;		/* 0x18 */
-	u32 irqenable;		/* 0x1C */
-	u8 res3[0x20];
-	u32 timeout_control;	/* 0x40 */
-	u8 res4[0xC];
-	u32 config;		/* 0x50 */
-	u32 status;		/* 0x54 */
-	u8 res5[0x8];		/* 0x58 */
-	struct gpmc_cs cs[8];	/* 0x60, 0x90, .. */
-	u8 res6[0x14];		/* 0x1E0 */
-	u32 ecc_config;		/* 0x1F4 */
-	u32 ecc_control;	/* 0x1F8 */
-	u32 ecc_size_config;	/* 0x1FC */
-	u32 ecc1_result;	/* 0x200 */
-	u32 ecc2_result;	/* 0x204 */
-	u32 ecc3_result;	/* 0x208 */
-	u32 ecc4_result;	/* 0x20C */
-	u32 ecc5_result;	/* 0x210 */
-	u32 ecc6_result;	/* 0x214 */
-	u32 ecc7_result;	/* 0x218 */
-	u32 ecc8_result;	/* 0x21C */
-	u32 ecc9_result;	/* 0x220 */
-	u8 res7[12];		/* 0x224 */
-	u32 testmomde_ctrl;	/* 0x230 */
-	u8 res8[12];		/* 0x234 */
-	struct bch_res_0_3 bch_result_0_3[2];	/* 0x240 */
-};
 
-/* Used for board specific gpmc initialization */
-extern struct gpmc *gpmc_cfg;
 
 #ifndef CONFIG_AM43XX
 /* Encapsulating core pll registers */
diff --git a/arch/arm/include/asm/arch-am33xx/omap_gpmc.h b/arch/arm/include/asm/arch-am33xx/omap_gpmc.h
deleted file mode 100644
index 00ad1d0..0000000
--- a/arch/arm/include/asm/arch-am33xx/omap_gpmc.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * (C) Copyright 2004-2008 Texas Instruments, <www.ti.com>
- * Rohit Choraria <rohitkc@ti.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#ifndef __ASM_ARCH_OMAP_GPMC_H
-#define __ASM_ARCH_OMAP_GPMC_H
-
-/* These GPMC_NAND_HW_BCHx_ECC_LAYOUT defines are based on AM33xx ELM */
-#define GPMC_NAND_HW_BCH4_ECC_LAYOUT {\
-	.eccbytes = 32,\
-	.eccpos = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,\
-				16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27,\
-				28, 29, 30, 31, 32, 33},\
-	.oobfree = {\
-		{.offset = 34,\
-		 .length = 30 } } \
-}
-
-#define GPMC_NAND_HW_BCH8_ECC_LAYOUT {\
-	.eccbytes = 56,\
-	.eccpos = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,\
-				16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27,\
-				28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39,\
-				40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51,\
-				52, 53, 54, 55, 56, 57},\
-	.oobfree = {\
-		{.offset = 58,\
-		 .length = 6 } } \
-}
-
-#define GPMC_NAND_HW_BCH16_ECC_LAYOUT {\
-	.eccbytes = 104,\
-	.eccpos = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,\
-				16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27,\
-				28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39,\
-				40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51,\
-				52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,\
-				64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75,\
-				76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87,\
-				88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99,\
-				100, 101, 102, 103, 104, 105},\
-	.oobfree = {\
-		{.offset = 106,\
-		 .length = 8 } } \
-}
-#endif /* __ASM_ARCH_OMAP_GPMC_H */
diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h b/arch/arm/include/asm/arch-am33xx/sys_proto.h
index 2e5c356..91ff2ad 100644
--- a/arch/arm/include/asm/arch-am33xx/sys_proto.h
+++ b/arch/arm/include/asm/arch-am33xx/sys_proto.h
@@ -10,6 +10,7 @@
 
 #ifndef _SYS_PROTO_H_
 #define _SYS_PROTO_H_
+#include <linux/mtd/omap_gpmc.h>
 #include <asm/arch/cpu.h>
 
 #define BOARD_REV_ID	0x0
diff --git a/arch/arm/include/asm/arch-omap3/cpu.h b/arch/arm/include/asm/arch-omap3/cpu.h
index 61ec8f2..4d06ef8 100644
--- a/arch/arm/include/asm/arch-omap3/cpu.h
+++ b/arch/arm/include/asm/arch-omap3/cpu.h
@@ -77,59 +77,7 @@ struct ctrl_id {
 #define GPMC_CONFIG_CS0_BASE	(GPMC_BASE + GPMC_CONFIG_CS0)
 
 #ifndef __KERNEL_STRICT_NAMES
-#ifndef __ASSEMBLY__
-struct gpmc_cs {
-	u32 config1;		/* 0x00 */
-	u32 config2;		/* 0x04 */
-	u32 config3;		/* 0x08 */
-	u32 config4;		/* 0x0C */
-	u32 config5;		/* 0x10 */
-	u32 config6;		/* 0x14 */
-	u32 config7;		/* 0x18 */
-	u32 nand_cmd;		/* 0x1C */
-	u32 nand_adr;		/* 0x20 */
-	u32 nand_dat;		/* 0x24 */
-	u8 res[8];		/* blow up to 0x30 byte */
-};
-
-struct bch_res_0_3 {
-	u32 bch_result_x[4];
-};
-
-struct gpmc {
-	u8 res1[0x10];
-	u32 sysconfig;		/* 0x10 */
-	u8 res2[0x4];
-	u32 irqstatus;		/* 0x18 */
-	u32 irqenable;		/* 0x1C */
-	u8 res3[0x20];
-	u32 timeout_control; 	/* 0x40 */
-	u8 res4[0xC];
-	u32 config;		/* 0x50 */
-	u32 status;		/* 0x54 */
-	u8 res5[0x8];	/* 0x58 */
-	struct gpmc_cs cs[8];	/* 0x60, 0x90, .. */
-	u8 res6[0x14];		/* 0x1E0 */
-	u32 ecc_config;		/* 0x1F4 */
-	u32 ecc_control;	/* 0x1F8 */
-	u32 ecc_size_config;	/* 0x1FC */
-	u32 ecc1_result;	/* 0x200 */
-	u32 ecc2_result;	/* 0x204 */
-	u32 ecc3_result;	/* 0x208 */
-	u32 ecc4_result;	/* 0x20C */
-	u32 ecc5_result;	/* 0x210 */
-	u32 ecc6_result;	/* 0x214 */
-	u32 ecc7_result;	/* 0x218 */
-	u32 ecc8_result;	/* 0x21C */
-	u32 ecc9_result;	/* 0x220 */
-	u8 res7[0x1C];		/* fill up to 0x240 */
-	struct bch_res_0_3 bch_result_0_3[7];	/* 0x240 */
-};
-
-/* Used for board specific gpmc initialization */
-extern struct gpmc *gpmc_cfg;
-
-#else /* __ASSEMBLY__ */
+#ifdef __ASSEMBLY__
 #define GPMC_CONFIG1		0x00
 #define GPMC_CONFIG2		0x04
 #define GPMC_CONFIG3		0x08
diff --git a/arch/arm/include/asm/arch-omap3/mem.h b/arch/arm/include/asm/arch-omap3/mem.h
index bcc22c4..1804191 100644
--- a/arch/arm/include/asm/arch-omap3/mem.h
+++ b/arch/arm/include/asm/arch-omap3/mem.h
@@ -419,6 +419,16 @@ enum {
 #define NET_GPMC_CONFIG6	0x00000FCF
 #define NET_GPMC_CONFIG7	0x00000f6c
 
+/* GPMC CS configuration for an SMSC LAN9221 ethernet controller */
+#define NET_LAN9221_GPMC_CONFIG1    0x00001000
+#define NET_LAN9221_GPMC_CONFIG2    0x00060700
+#define NET_LAN9221_GPMC_CONFIG3    0x00020201
+#define NET_LAN9221_GPMC_CONFIG4    0x06000700
+#define NET_LAN9221_GPMC_CONFIG5    0x0006090A
+#define NET_LAN9221_GPMC_CONFIG6    0x87030000
+#define NET_LAN9221_GPMC_CONFIG7    0x00000f6c
+
+
 /* max number of GPMC Chip Selects */
 #define GPMC_MAX_CS	8
 /* max number of GPMC regs */
diff --git a/arch/arm/include/asm/arch-omap3/omap_gpmc.h b/arch/arm/include/asm/arch-omap3/omap_gpmc.h
deleted file mode 100644
index bf23219..0000000
--- a/arch/arm/include/asm/arch-omap3/omap_gpmc.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * (C) Copyright 2004-2008 Texas Instruments, <www.ti.com>
- * Rohit Choraria <rohitkc@ti.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#ifndef __ASM_ARCH_OMAP_GPMC_H
-#define __ASM_ARCH_OMAP_GPMC_H
-
-/*
- * These GPMC_NAND_HW_BCHx_ECC_LAYOUT defines using the BCH library.
- * The OOB layout was first defined by linx kernel in commit
- * 0e618ef0a6a33cf7ef96c2c824402088dd8ef48c, we have to reuse it here cause
- * we want to be compatible.
- */
-#define GPMC_NAND_HW_BCH8_ECC_LAYOUT {\
-	.eccbytes = 56,\
-	.eccpos = {12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22,\
-			23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36,\
-			37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50,\
-			51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63},\
-	.oobfree = {\
-		{.offset = 2,\
-		 .length = 10 } } \
-}
-
-/* GPMC CS configuration for an SMSC LAN9221 ethernet controller */
-#define NET_LAN9221_GPMC_CONFIG1    0x00001000
-#define NET_LAN9221_GPMC_CONFIG2    0x00060700
-#define NET_LAN9221_GPMC_CONFIG3    0x00020201
-#define NET_LAN9221_GPMC_CONFIG4    0x06000700
-#define NET_LAN9221_GPMC_CONFIG5    0x0006090A
-#define NET_LAN9221_GPMC_CONFIG6    0x87030000
-#define NET_LAN9221_GPMC_CONFIG7    0x00000f6c
-
-#endif /* __ASM_ARCH_OMAP_GPMC_H */
diff --git a/arch/arm/include/asm/arch-omap3/sys_proto.h b/arch/arm/include/asm/arch-omap3/sys_proto.h
index 43b54f7..44fa66f 100644
--- a/arch/arm/include/asm/arch-omap3/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap3/sys_proto.h
@@ -7,6 +7,7 @@
  */
 #ifndef _SYS_PROTO_H_
 #define _SYS_PROTO_H_
+#include <linux/mtd/omap_gpmc.h>
 
 typedef struct {
 	u32 mtype;
diff --git a/arch/arm/include/asm/arch-omap4/cpu.h b/arch/arm/include/asm/arch-omap4/cpu.h
index 545d9d9..c21fb54 100644
--- a/arch/arm/include/asm/arch-omap4/cpu.h
+++ b/arch/arm/include/asm/arch-omap4/cpu.h
@@ -14,51 +14,6 @@
 
 #ifndef __KERNEL_STRICT_NAMES
 #ifndef __ASSEMBLY__
-struct gpmc_cs {
-	u32 config1;		/* 0x00 */
-	u32 config2;		/* 0x04 */
-	u32 config3;		/* 0x08 */
-	u32 config4;		/* 0x0C */
-	u32 config5;		/* 0x10 */
-	u32 config6;		/* 0x14 */
-	u32 config7;		/* 0x18 */
-	u32 nand_cmd;		/* 0x1C */
-	u32 nand_adr;		/* 0x20 */
-	u32 nand_dat;		/* 0x24 */
-	u8 res[8];		/* blow up to 0x30 byte */
-};
-
-struct gpmc {
-	u8 res1[0x10];
-	u32 sysconfig;		/* 0x10 */
-	u8 res2[0x4];
-	u32 irqstatus;		/* 0x18 */
-	u32 irqenable;		/* 0x1C */
-	u8 res3[0x20];
-	u32 timeout_control;	/* 0x40 */
-	u8 res4[0xC];
-	u32 config;		/* 0x50 */
-	u32 status;		/* 0x54 */
-	u8 res5[0x8];	/* 0x58 */
-	struct gpmc_cs cs[8];	/* 0x60, 0x90, .. */
-	u8 res6[0x14];		/* 0x1E0 */
-	u32 ecc_config;		/* 0x1F4 */
-	u32 ecc_control;	/* 0x1F8 */
-	u32 ecc_size_config;	/* 0x1FC */
-	u32 ecc1_result;	/* 0x200 */
-	u32 ecc2_result;	/* 0x204 */
-	u32 ecc3_result;	/* 0x208 */
-	u32 ecc4_result;	/* 0x20C */
-	u32 ecc5_result;	/* 0x210 */
-	u32 ecc6_result;	/* 0x214 */
-	u32 ecc7_result;	/* 0x218 */
-	u32 ecc8_result;	/* 0x21C */
-	u32 ecc9_result;	/* 0x220 */
-};
-
-/* Used for board specific gpmc initialization */
-extern struct gpmc *gpmc_cfg;
-
 struct gptimer {
 	u32 tidr;		/* 0x00 r */
 	u8 res[0xc];
diff --git a/arch/arm/include/asm/arch-omap4/sys_proto.h b/arch/arm/include/asm/arch-omap4/sys_proto.h
index fc94725..b338a15 100644
--- a/arch/arm/include/asm/arch-omap4/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap4/sys_proto.h
@@ -12,6 +12,7 @@
 #include <asm/arch/clock.h>
 #include <asm/io.h>
 #include <asm/omap_common.h>
+#include <linux/mtd/omap_gpmc.h>
 #include <asm/arch/mux_omap4.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/arm/include/asm/arch-omap5/cpu.h b/arch/arm/include/asm/arch-omap5/cpu.h
index fb5a568..5f1d745 100644
--- a/arch/arm/include/asm/arch-omap5/cpu.h
+++ b/arch/arm/include/asm/arch-omap5/cpu.h
@@ -16,51 +16,6 @@
 
 #ifndef __KERNEL_STRICT_NAMES
 #ifndef __ASSEMBLY__
-struct gpmc_cs {
-	u32 config1;		/* 0x00 */
-	u32 config2;		/* 0x04 */
-	u32 config3;		/* 0x08 */
-	u32 config4;		/* 0x0C */
-	u32 config5;		/* 0x10 */
-	u32 config6;		/* 0x14 */
-	u32 config7;		/* 0x18 */
-	u32 nand_cmd;		/* 0x1C */
-	u32 nand_adr;		/* 0x20 */
-	u32 nand_dat;		/* 0x24 */
-	u8 res[8];		/* blow up to 0x30 byte */
-};
-
-struct gpmc {
-	u8 res1[0x10];
-	u32 sysconfig;		/* 0x10 */
-	u8 res2[0x4];
-	u32 irqstatus;		/* 0x18 */
-	u32 irqenable;		/* 0x1C */
-	u8 res3[0x20];
-	u32 timeout_control;	/* 0x40 */
-	u8 res4[0xC];
-	u32 config;		/* 0x50 */
-	u32 status;		/* 0x54 */
-	u8 res5[0x8];	/* 0x58 */
-	struct gpmc_cs cs[8];	/* 0x60, 0x90, .. */
-	u8 res6[0x14];		/* 0x1E0 */
-	u32 ecc_config;		/* 0x1F4 */
-	u32 ecc_control;	/* 0x1F8 */
-	u32 ecc_size_config;	/* 0x1FC */
-	u32 ecc1_result;	/* 0x200 */
-	u32 ecc2_result;	/* 0x204 */
-	u32 ecc3_result;	/* 0x208 */
-	u32 ecc4_result;	/* 0x20C */
-	u32 ecc5_result;	/* 0x210 */
-	u32 ecc6_result;	/* 0x214 */
-	u32 ecc7_result;	/* 0x218 */
-	u32 ecc8_result;	/* 0x21C */
-	u32 ecc9_result;	/* 0x220 */
-};
-
-/* Used for board specific gpmc initialization */
-extern struct gpmc *gpmc_cfg;
-
 struct gptimer {
 	u32 tidr;		/* 0x00 r */
 	u8 res1[0xc];
diff --git a/arch/arm/include/asm/arch-omap5/sys_proto.h b/arch/arm/include/asm/arch-omap5/sys_proto.h
index 43011a4..9e007c8 100644
--- a/arch/arm/include/asm/arch-omap5/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap5/sys_proto.h
@@ -12,6 +12,7 @@
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/omap_common.h>
+#include <linux/mtd/omap_gpmc.h>
 #include <asm/arch/clock.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/arm/include/asm/omap_elm.h b/arch/arm/include/asm/omap_elm.h
deleted file mode 100644
index 45454ea..0000000
--- a/arch/arm/include/asm/omap_elm.h
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * (C) Copyright 2010-2011 Texas Instruments, <www.ti.com>
- * Mansoor Ahamed <mansoor.ahamed@ti.com>
- *
- * Derived from work done by Rohit Choraria <rohitkc@ti.com> for omap3
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#ifndef __ASM_ARCH_ELM_H
-#define __ASM_ARCH_ELM_H
-/*
- * ELM Module Registers
- */
-
-/* ELM registers bit fields */
-#define ELM_SYSCONFIG_SOFTRESET_MASK			(0x2)
-#define ELM_SYSCONFIG_SOFTRESET			(0x2)
-#define ELM_SYSSTATUS_RESETDONE_MASK			(0x1)
-#define ELM_SYSSTATUS_RESETDONE			(0x1)
-#define ELM_LOCATION_CONFIG_ECC_BCH_LEVEL_MASK		(0x3)
-#define ELM_LOCATION_CONFIG_ECC_SIZE_MASK		(0x7FF0000)
-#define ELM_LOCATION_CONFIG_ECC_SIZE_POS		(16)
-#define ELM_SYNDROME_FRAGMENT_6_SYNDROME_VALID		(0x00010000)
-#define ELM_LOCATION_STATUS_ECC_CORRECTABLE_MASK	(0x100)
-#define ELM_LOCATION_STATUS_ECC_NB_ERRORS_MASK		(0x1F)
-
-#ifndef __ASSEMBLY__
-
-enum bch_level {
-	BCH_4_BIT = 0,
-	BCH_8_BIT,
-	BCH_16_BIT
-};
-
-
-/* BCH syndrome registers */
-struct syndrome {
-	u32 syndrome_fragment_x[7];	/* 0x400, 0x404.... 0x418 */
-	u8 res1[36];			/* 0x41c */
-};
-
-/* BCH error status & location register */
-struct location {
-	u32 location_status;		/* 0x800 */
-	u8 res1[124];			/* 0x804 */
-	u32 error_location_x[16];	/* 0x880.... */
-	u8 res2[64];			/* 0x8c0 */
-};
-
-/* BCH ELM register map - do not try to allocate memmory for this structure.
- * We have used plenty of reserved variables to fill the slots in the ELM
- * register memory map.
- * Directly initialize the struct pointer to ELM base address.
- */
-struct elm {
-	u32 rev;				/* 0x000 */
-	u8 res1[12];				/* 0x004 */
-	u32 sysconfig;				/* 0x010 */
-	u32 sysstatus;				/* 0x014 */
-	u32 irqstatus;				/* 0x018 */
-	u32 irqenable;				/* 0x01c */
-	u32 location_config;			/* 0x020 */
-	u8 res2[92];				/* 0x024 */
-	u32 page_ctrl;				/* 0x080 */
-	u8 res3[892];				/* 0x084 */
-	struct  syndrome syndrome_fragments[8]; /* 0x400 */
-	u8 res4[512];				/* 0x600 */
-	struct location  error_location[8];	/* 0x800 */
-};
-
-int elm_check_error(u8 *syndrome, u32 nibbles, u32 *error_count,
-		u32 *error_locations);
-int elm_config(enum bch_level level);
-void elm_reset(void);
-void elm_init(void);
-#endif /* __ASSEMBLY__ */
-#endif /* __ASM_ARCH_ELM_H */
diff --git a/arch/arm/include/asm/omap_gpmc.h b/arch/arm/include/asm/omap_gpmc.h
deleted file mode 100644
index d4143ec..0000000
--- a/arch/arm/include/asm/omap_gpmc.h
+++ /dev/null
@@ -1,87 +0,0 @@
-/*
- * (C) Copyright 2004-2008 Texas Instruments, <www.ti.com>
- * Rohit Choraria <rohitkc@ti.com>
- *
- * (C) Copyright 2013 Andreas Bießmann <andreas.devel@googlemail.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#ifndef __ASM_OMAP_GPMC_H
-#define __ASM_OMAP_GPMC_H
-
-#include <asm/arch/omap_gpmc.h>
-
-#define GPMC_BUF_EMPTY	0
-#define GPMC_BUF_FULL	1
-
-#define ECCCLEAR	(0x1 << 8)
-#define ECCRESULTREG1	(0x1 << 0)
-#define ECCSIZE512BYTE	0xFF
-#define ECCSIZE1	(ECCSIZE512BYTE << 22)
-#define ECCSIZE0	(ECCSIZE512BYTE << 12)
-#define ECCSIZE0SEL	(0x000 << 0)
-
-/* Generic ECC Layouts */
-/* Large Page x8 NAND device Layout */
-#ifdef GPMC_NAND_ECC_LP_x8_LAYOUT
-#define GPMC_NAND_HW_ECC_LAYOUT {\
-	.eccbytes = 12,\
-	.eccpos = {1, 2, 3, 4, 5, 6, 7, 8,\
-		9, 10, 11, 12},\
-	.oobfree = {\
-		{.offset = 13,\
-		 .length = 51 } } \
-}
-#endif
-
-/* Large Page x16 NAND device Layout */
-#ifdef GPMC_NAND_ECC_LP_x16_LAYOUT
-#define GPMC_NAND_HW_ECC_LAYOUT {\
-	.eccbytes = 12,\
-	.eccpos = {2, 3, 4, 5, 6, 7, 8, 9,\
-		10, 11, 12, 13},\
-	.oobfree = {\
-		{.offset = 14,\
-		 .length = 50 } } \
-}
-#endif
-
-/* Small Page x8 NAND device Layout */
-#ifdef GPMC_NAND_ECC_SP_x8_LAYOUT
-#define GPMC_NAND_HW_ECC_LAYOUT {\
-	.eccbytes = 3,\
-	.eccpos = {1, 2, 3},\
-	.oobfree = {\
-		{.offset = 4,\
-		 .length = 12 } } \
-}
-#endif
-
-/* Small Page x16 NAND device Layout */
-#ifdef GPMC_NAND_ECC_SP_x16_LAYOUT
-#define GPMC_NAND_HW_ECC_LAYOUT {\
-	.eccbytes = 3,\
-	.eccpos = {2, 3, 4},\
-	.oobfree = {\
-		{.offset = 5,\
-		 .length = 11 } } \
-}
-#endif
-
-enum omap_ecc {
-	/* 1-bit  ECC calculation by Software, Error detection by Software */
-	OMAP_ECC_HAM1_CODE_SW = 1, /* avoid un-initialized int can be 0x0 */
-	/* 1-bit  ECC calculation by GPMC, Error detection by Software */
-	/* ECC layout compatible to legacy ROMCODE. */
-	OMAP_ECC_HAM1_CODE_HW,
-	/* 4-bit  ECC calculation by GPMC, Error detection by Software */
-	OMAP_ECC_BCH4_CODE_HW_DETECTION_SW,
-	/* 4-bit  ECC calculation by GPMC, Error detection by ELM */
-	OMAP_ECC_BCH4_CODE_HW,
-	/* 8-bit  ECC calculation by GPMC, Error detection by Software */
-	OMAP_ECC_BCH8_CODE_HW_DETECTION_SW,
-	/* 8-bit  ECC calculation by GPMC, Error detection by ELM */
-	OMAP_ECC_BCH8_CODE_HW,
-};
-
-#endif /* __ASM_OMAP_GPMC_H */