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| author | Taras Kondratiuk <taras@ti.com> | 2013-08-06 16:16:50 +0300 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-08-15 18:38:35 -0400 |
| commit | 0474fb0e2b22a831cf47848b21bdb3e152c108bc (patch) | |
| tree | fe6257a7909070cc3a2b1f9efad4de1d6e5b7739 /arch | |
| parent | 2f6af82719723033b35f2bf97e3fe4f65400781f (diff) | |
| download | u-boot-imx-0474fb0e2b22a831cf47848b21bdb3e152c108bc.zip u-boot-imx-0474fb0e2b22a831cf47848b21bdb3e152c108bc.tar.gz u-boot-imx-0474fb0e2b22a831cf47848b21bdb3e152c108bc.tar.bz2 | |
omap: emif: Set initial DDR PHY config first
Commit "OMAP5: emif/ddr: Change emif settings as required for ES1.0 silicon"
(f40107345cbcd6e0d1747eda45e76c4e2a6df0db)
changed sequence to set final DDR PHY config register value at the beginning.
Looks like it was made by mistake and should be reverted.
Signed-off-by: Taras Kondratiuk <taras@ti.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/cpu/armv7/omap-common/emif-common.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/omap-common/emif-common.c b/arch/arm/cpu/armv7/omap-common/emif-common.c index ece3655..b0e1caa 100644 --- a/arch/arm/cpu/armv7/omap-common/emif-common.c +++ b/arch/arm/cpu/armv7/omap-common/emif-common.c @@ -153,7 +153,7 @@ static void lpddr2_init(u32 base, const struct emif_regs *regs) * un-locked frequency & default RL */ writel(regs->sdram_config_init, &emif->emif_sdram_config); - writel(regs->emif_ddr_phy_ctlr_1, &emif->emif_ddr_phy_ctrl_1); + writel(regs->emif_ddr_phy_ctlr_1_init, &emif->emif_ddr_phy_ctrl_1); do_ext_phy_settings(base, regs); |