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authorMasahiro Yamada <yamada.m@jp.panasonic.com>2014-09-18 13:28:06 +0900
committerTom Rini <trini@ti.com>2014-09-24 18:30:29 -0400
commitc79cba37b3b42cf8fbd71babcd8998867f76fead (patch)
tree52e446aa0b8c3a623715da84b0fc9bdbd4826c0d /arch
parent87f13aa00d0279fcc96530404c3a104eb4cb1672 (diff)
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cosmetic: replace MIN, MAX with min, max
The macro MIN, MAX is defined as the aliase of min, max, respectively. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/cpu/arm1176/tnetv107x/clock.c2
-rw-r--r--arch/arm/cpu/armv7/mx6/ddr.c40
-rw-r--r--arch/x86/lib/physmem.c4
3 files changed, 23 insertions, 23 deletions
diff --git a/arch/arm/cpu/arm1176/tnetv107x/clock.c b/arch/arm/cpu/arm1176/tnetv107x/clock.c
index 3708b6f..47c23bb 100644
--- a/arch/arm/cpu/arm1176/tnetv107x/clock.c
+++ b/arch/arm/cpu/arm1176/tnetv107x/clock.c
@@ -362,7 +362,7 @@ static void init_pll(const struct pll_init_data *data)
pllctl_reg_write(data->pll, ctl, tmp);
mult = data->pll_freq / fpll;
- for (mult = MAX(mult, 1); mult <= MAX_MULT; mult++) {
+ for (mult = max(mult, 1); mult <= MAX_MULT; mult++) {
div = (fpll * mult) / data->pll_freq;
if (div < 1 || div > MAX_DIV)
continue;
diff --git a/arch/arm/cpu/armv7/mx6/ddr.c b/arch/arm/cpu/armv7/mx6/ddr.c
index 7b5c1e4..7a9b03a 100644
--- a/arch/arm/cpu/armv7/mx6/ddr.c
+++ b/arch/arm/cpu/armv7/mx6/ddr.c
@@ -247,47 +247,47 @@ void mx6_dram_cfg(const struct mx6_ddr_sysinfo *sysinfo,
switch (ddr3_cfg->mem_speed) {
case 800:
- txp = DIV_ROUND_UP(MAX(3 * clkper, 7500), clkper) - 1;
- tcke = DIV_ROUND_UP(MAX(3 * clkper, 7500), clkper) - 1;
+ txp = DIV_ROUND_UP(max(3 * clkper, 7500), clkper) - 1;
+ tcke = DIV_ROUND_UP(max(3 * clkper, 7500), clkper) - 1;
if (ddr3_cfg->pagesz == 1) {
tfaw = DIV_ROUND_UP(40000, clkper) - 1;
- trrd = DIV_ROUND_UP(MAX(4 * clkper, 10000), clkper) - 1;
+ trrd = DIV_ROUND_UP(max(4 * clkper, 10000), clkper) - 1;
} else {
tfaw = DIV_ROUND_UP(50000, clkper) - 1;
- trrd = DIV_ROUND_UP(MAX(4 * clkper, 10000), clkper) - 1;
+ trrd = DIV_ROUND_UP(max(4 * clkper, 10000), clkper) - 1;
}
break;
case 1066:
- txp = DIV_ROUND_UP(MAX(3 * clkper, 7500), clkper) - 1;
- tcke = DIV_ROUND_UP(MAX(3 * clkper, 5625), clkper) - 1;
+ txp = DIV_ROUND_UP(max(3 * clkper, 7500), clkper) - 1;
+ tcke = DIV_ROUND_UP(max(3 * clkper, 5625), clkper) - 1;
if (ddr3_cfg->pagesz == 1) {
tfaw = DIV_ROUND_UP(37500, clkper) - 1;
- trrd = DIV_ROUND_UP(MAX(4 * clkper, 7500), clkper) - 1;
+ trrd = DIV_ROUND_UP(max(4 * clkper, 7500), clkper) - 1;
} else {
tfaw = DIV_ROUND_UP(50000, clkper) - 1;
- trrd = DIV_ROUND_UP(MAX(4 * clkper, 10000), clkper) - 1;
+ trrd = DIV_ROUND_UP(max(4 * clkper, 10000), clkper) - 1;
}
break;
case 1333:
- txp = DIV_ROUND_UP(MAX(3 * clkper, 6000), clkper) - 1;
- tcke = DIV_ROUND_UP(MAX(3 * clkper, 5625), clkper) - 1;
+ txp = DIV_ROUND_UP(max(3 * clkper, 6000), clkper) - 1;
+ tcke = DIV_ROUND_UP(max(3 * clkper, 5625), clkper) - 1;
if (ddr3_cfg->pagesz == 1) {
tfaw = DIV_ROUND_UP(30000, clkper) - 1;
- trrd = DIV_ROUND_UP(MAX(4 * clkper, 6000), clkper) - 1;
+ trrd = DIV_ROUND_UP(max(4 * clkper, 6000), clkper) - 1;
} else {
tfaw = DIV_ROUND_UP(45000, clkper) - 1;
- trrd = DIV_ROUND_UP(MAX(4 * clkper, 7500), clkper) - 1;
+ trrd = DIV_ROUND_UP(max(4 * clkper, 7500), clkper) - 1;
}
break;
case 1600:
- txp = DIV_ROUND_UP(MAX(3 * clkper, 6000), clkper) - 1;
- tcke = DIV_ROUND_UP(MAX(3 * clkper, 5000), clkper) - 1;
+ txp = DIV_ROUND_UP(max(3 * clkper, 6000), clkper) - 1;
+ tcke = DIV_ROUND_UP(max(3 * clkper, 5000), clkper) - 1;
if (ddr3_cfg->pagesz == 1) {
tfaw = DIV_ROUND_UP(30000, clkper) - 1;
- trrd = DIV_ROUND_UP(MAX(4 * clkper, 6000), clkper) - 1;
+ trrd = DIV_ROUND_UP(max(4 * clkper, 6000), clkper) - 1;
} else {
tfaw = DIV_ROUND_UP(40000, clkper) - 1;
- trrd = DIV_ROUND_UP(MAX(4 * clkper, 7500), clkper) - 1;
+ trrd = DIV_ROUND_UP(max(4 * clkper, 7500), clkper) - 1;
}
break;
default:
@@ -295,18 +295,18 @@ void mx6_dram_cfg(const struct mx6_ddr_sysinfo *sysinfo,
hang();
break;
}
- txpdll = DIV_ROUND_UP(MAX(10 * clkper, 24000), clkper) - 1;
- tcksre = DIV_ROUND_UP(MAX(5 * clkper, 10000), clkper);
+ txpdll = DIV_ROUND_UP(max(10 * clkper, 24000), clkper) - 1;
+ tcksre = DIV_ROUND_UP(max(5 * clkper, 10000), clkper);
taonpd = DIV_ROUND_UP(2000, clkper) - 1;
tcksrx = tcksre;
taofpd = taonpd;
twr = DIV_ROUND_UP(15000, clkper) - 1;
- tmrd = DIV_ROUND_UP(MAX(12 * clkper, 15000), clkper) - 1;
+ tmrd = DIV_ROUND_UP(max(12 * clkper, 15000), clkper) - 1;
trc = DIV_ROUND_UP(ddr3_cfg->trcmin, clkper / 10) - 1;
tras = DIV_ROUND_UP(ddr3_cfg->trasmin, clkper / 10) - 1;
tcl = DIV_ROUND_UP(ddr3_cfg->trcd, clkper / 10) - 3;
trp = DIV_ROUND_UP(ddr3_cfg->trcd, clkper / 10) - 1;
- twtr = ROUND(MAX(4 * clkper, 7500) / clkper, 1) - 1;
+ twtr = ROUND(max(4 * clkper, 7500) / clkper, 1) - 1;
trcd = trp;
trtp = twtr;
cs0_end = 4 * sysinfo->cs_density - 1;
diff --git a/arch/x86/lib/physmem.c b/arch/x86/lib/physmem.c
index 59b3fe9..b57b2c3 100644
--- a/arch/x86/lib/physmem.c
+++ b/arch/x86/lib/physmem.c
@@ -189,7 +189,7 @@ phys_addr_t arch_phys_memset(phys_addr_t start, int c, phys_size_t size)
/* Handle memory below 4GB. */
if (start <= max_addr) {
- phys_size_t low_size = MIN(max_addr + 1 - start, size);
+ phys_size_t low_size = min(max_addr + 1 - start, size);
void *start_ptr = (void *)(uintptr_t)start;
assert(((phys_addr_t)(uintptr_t)start) == start);
@@ -208,7 +208,7 @@ phys_addr_t arch_phys_memset(phys_addr_t start, int c, phys_size_t size)
/* Handle the first partial page. */
if (offset) {
phys_addr_t end =
- MIN(map_addr + LARGE_PAGE_SIZE, start + size);
+ min(map_addr + LARGE_PAGE_SIZE, start + size);
phys_size_t cur_size = end - start;
x86_phys_memset_page(map_addr, offset, c, cur_size);
size -= cur_size;