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authorChander Kashyap <chander.kashyap@linaro.org>2012-02-05 23:01:45 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-02-12 10:11:30 +0100
commit5e46f83cc3569b95cef68dfd0722663260af91d0 (patch)
treee034f53d74bd747554fcbb311515665b19c93a93 /arch
parent8aca4d6436dda130a4711940bd10a0a9220b0eb1 (diff)
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Exynos: Clock.c: Use CONFIG_SYS_CLK_FREQ macro
CONFIG_SYS_CLK_FREQ_C210 macro giving notion of S5PC2XX (Exynos4) architecture. Replace CONFIG_SYS_CLK_FREQ_C210 with CONFIG_SYS_CLK_FREQ to make it generic for exynos architecture. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/cpu/armv7/exynos/clock.c6
1 files changed, 1 insertions, 5 deletions
diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c
index 0c199cd..4d92c53 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -26,10 +26,6 @@
#include <asm/arch/clock.h>
#include <asm/arch/clk.h>
-#ifndef CONFIG_SYS_CLK_FREQ_C210
-#define CONFIG_SYS_CLK_FREQ_C210 24000000
-#endif
-
/* exynos4: return pll clock frequency */
static unsigned long exynos4_get_pll_clk(int pllreg)
{
@@ -76,7 +72,7 @@ static unsigned long exynos4_get_pll_clk(int pllreg)
/* SDIV [2:0] */
s = r & 0x7;
- freq = CONFIG_SYS_CLK_FREQ_C210;
+ freq = CONFIG_SYS_CLK_FREQ;
if (pllreg == EPLL) {
k = k & 0xffff;