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authorMarek Vasut <marex@denx.de>2012-11-30 05:22:13 +0000
committerStefano Babic <sbabic@denx.de>2012-12-04 09:27:21 +0100
commit1230e7bc2d775216d0ce627a82821c9ae2b08334 (patch)
tree704449f2fb5c469f809d2a8f475ef4ca40ab9d58 /arch
parent77cb33bd25c97be3f5a878831cf743778e2e7dac (diff)
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mxs: Properly setup VDDD in power supply setup code
The memory setup code adjusted the VDDD voltage. Remove this adjustment and configure the VDDD voltage correctly in the power supply setup code. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c13
-rw-r--r--arch/arm/cpu/arm926ejs/mxs/spl_power_init.c2
2 files changed, 1 insertions, 14 deletions
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
index e693145..8904e24 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
@@ -171,17 +171,6 @@ void mxs_mem_setup_vdda(void)
&power_regs->hw_power_vddactrl);
}
-void mxs_mem_setup_vddd(void)
-{
- struct mxs_power_regs *power_regs =
- (struct mxs_power_regs *)MXS_POWER_BASE;
-
- writel((0x1c << POWER_VDDDCTRL_TRG_OFFSET) |
- (0x7 << POWER_VDDDCTRL_BO_OFFSET_OFFSET) |
- POWER_VDDDCTRL_LINREG_OFFSET_1STEPS_BELOW,
- &power_regs->hw_power_vdddctrl);
-}
-
uint32_t mxs_mem_get_size(void)
{
uint32_t sz, da;
@@ -241,8 +230,6 @@ void mxs_mem_init(void)
while (!(readl(MXS_DRAM_BASE + 0xe8) & (1 << 20)))
;
- mxs_mem_setup_vddd();
-
early_delay(10000);
mxs_mem_setup_cpu_and_hbus();
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
index 0d80158..2bc6ad1 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
@@ -897,7 +897,7 @@ void mxs_power_init(void)
mxs_enable_output_rail_protection();
mxs_power_set_vddx(&mxs_vddio_cfg, 3300, 3150);
- mxs_power_set_vddx(&mxs_vddd_cfg, 1350, 1200);
+ mxs_power_set_vddx(&mxs_vddd_cfg, 1500, 1000);
writel(POWER_CTRL_VDDD_BO_IRQ | POWER_CTRL_VDDA_BO_IRQ |
POWER_CTRL_VDDIO_BO_IRQ | POWER_CTRL_VDD5V_DROOP_IRQ |