summaryrefslogtreecommitdiff
path: root/arch
diff options
context:
space:
mode:
authorAlbert ARIBAUD <albert.u.boot@aribaud.net>2013-06-11 14:17:31 +0200
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2013-06-21 23:04:05 +0200
commit09d81184e103a07825d9f16e86e37c28d3605568 (patch)
treee0be1af5c25bc5a29c2cb4f897404126821ac0bf /arch
parentc37980c31a30f0623a0ca8f112298e44039ed6bb (diff)
downloadu-boot-imx-09d81184e103a07825d9f16e86e37c28d3605568.zip
u-boot-imx-09d81184e103a07825d9f16e86e37c28d3605568.tar.gz
u-boot-imx-09d81184e103a07825d9f16e86e37c28d3605568.tar.bz2
remove all references to .dynsym
Discard all .dynsym sections from linker scripts Remove all __dynsym_start definitions from linker scripts Remove all __dynsym_start references from the codebase Note: this touches include/asm-generic/sections.h, which is not ARM-specific, but actual uses of __dynsym_start are only in ARM, so this patch can safely go through the ARM repository. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Tested-by: Lubomir Popov <lpopov@mm-sol.com> Tested-by: Jeroen Hofstee <jeroen@myspectrum.nl> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds5
-rw-r--r--arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds5
-rw-r--r--arch/arm/cpu/ixp/u-boot.lds6
-rw-r--r--arch/arm/cpu/u-boot-spl.lds6
-rw-r--r--arch/arm/cpu/u-boot.lds6
-rw-r--r--arch/arm/lib/relocate.S13
6 files changed, 3 insertions, 38 deletions
diff --git a/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds b/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
index 673c725..f4e7525 100644
--- a/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
+++ b/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
@@ -57,11 +57,6 @@ SECTIONS
__rel_dyn_end = .;
}
- .dynsym : {
- __dynsym_start = .;
- *(.dynsym)
- }
-
.bss : {
. = ALIGN(4);
__bss_start = .;
diff --git a/arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds b/arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds
index 967a135..446d095 100644
--- a/arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds
+++ b/arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds
@@ -57,11 +57,6 @@ SECTIONS
__rel_dyn_end = .;
}
- .dynsym : {
- __dynsym_start = .;
- *(.dynsym)
- }
-
.bss : {
. = ALIGN(4);
__bss_start = .;
diff --git a/arch/arm/cpu/ixp/u-boot.lds b/arch/arm/cpu/ixp/u-boot.lds
index 553589c..5cfff68 100644
--- a/arch/arm/cpu/ixp/u-boot.lds
+++ b/arch/arm/cpu/ixp/u-boot.lds
@@ -62,11 +62,6 @@ SECTIONS
__rel_dyn_end = .;
}
- .dynsym : {
- __dynsym_start = .;
- *(.dynsym)
- }
-
_end = .;
/*
@@ -88,6 +83,7 @@ SECTIONS
KEEP(*(.__bss_end));
}
+ /DISCARD/ : { *(.dynsym) }
/DISCARD/ : { *(.dynstr*) }
/DISCARD/ : { *(.dynamic*) }
/DISCARD/ : { *(.plt*) }
diff --git a/arch/arm/cpu/u-boot-spl.lds b/arch/arm/cpu/u-boot-spl.lds
index 1408f03..b6ed25f 100644
--- a/arch/arm/cpu/u-boot-spl.lds
+++ b/arch/arm/cpu/u-boot-spl.lds
@@ -58,11 +58,6 @@ SECTIONS
__rel_dyn_end = .;
}
- .dynsym : {
- __dynsym_start = .;
- *(.dynsym)
- }
-
_end = .;
.bss __rel_dyn_start (OVERLAY) : {
@@ -72,6 +67,7 @@ SECTIONS
__bss_end = .;
}
+ /DISCARD/ : { *(.dynsym) }
/DISCARD/ : { *(.dynstr*) }
/DISCARD/ : { *(.dynamic*) }
/DISCARD/ : { *(.plt*) }
diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
index d9bbee3..fe2ca98 100644
--- a/arch/arm/cpu/u-boot.lds
+++ b/arch/arm/cpu/u-boot.lds
@@ -65,11 +65,6 @@ SECTIONS
__rel_dyn_end = .;
}
- .dynsym : {
- __dynsym_start = .;
- *(.dynsym)
- }
-
_end = .;
/*
@@ -101,6 +96,7 @@ SECTIONS
KEEP(*(.__bss_end));
}
+ /DISCARD/ : { *(.dynsym) }
/DISCARD/ : { *(.dynstr*) }
/DISCARD/ : { *(.dynamic*) }
/DISCARD/ : { *(.plt*) }
diff --git a/arch/arm/lib/relocate.S b/arch/arm/lib/relocate.S
index 4446da9..7a7c4c0 100644
--- a/arch/arm/lib/relocate.S
+++ b/arch/arm/lib/relocate.S
@@ -56,8 +56,6 @@ copy_loop:
/*
* fix .rel.dyn relocations
*/
- ldr r10, _dynsym_start_ofs /* r10 <- __dynsym_start local ofs */
- add r10, r10, r7 /* r10 <- SRC &__dynsym_start */
ldr r2, _rel_dyn_start_ofs /* r2 <- __rel_dyn_start local ofs */
add r2, r2, r7 /* r2 <- SRC &__rel_dyn_start */
ldr r3, _rel_dyn_end_ofs /* r3 <- __rel_dyn_end local ofs */
@@ -69,17 +67,8 @@ fixloop:
and r7, r1, #0xff
cmp r7, #23 /* relative fixup? */
beq fixrel
- cmp r7, #2 /* absolute fixup? */
- beq fixabs
/* ignore unknown type of fixup */
b fixnext
-fixabs:
- /* absolute fix: set location to (offset) symbol value */
- mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
- add r1, r10, r1 /* r1 <- address of symbol in table */
- ldr r1, [r1, #4] /* r1 <- symbol value */
- add r1, r1, r9 /* r1 <- relocated sym addr */
- b fixnext
fixrel:
/* relative fix: increase location by offset */
ldr r1, [r0]
@@ -106,7 +95,5 @@ _rel_dyn_start_ofs:
.word __rel_dyn_start - relocate_code
_rel_dyn_end_ofs:
.word __rel_dyn_end - relocate_code
-_dynsym_start_ofs:
- .word __dynsym_start - relocate_code
ENDPROC(relocate_code)