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authorbhaskar upadhaya <Bhaskar.Upadhaya@freescale.com>2011-02-02 14:44:28 +0000
committerKumar Gala <galak@kernel.crashing.org>2011-04-04 09:24:43 -0500
commitf5feb5afb2d4cd02480056c37ebc111de3ee04fc (patch)
tree7fae2034b37f562cb0bfd2c9b908a11bdb7d3057 /arch
parent939cdcdc622840d43dd01b6a9509abcb6f4c24f6 (diff)
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powerpc/85xx: Update timer-frequency prop in ptp_timer node of device tree
Fix up the device tree property associated with the IEEE 1588 timer source frequency. Currently we only support the IEEE 1588 timer source being the internal eTSEC system clock (for those SoCs with IEEE 1588 support). The eTSEC clock is ccb_clk/2. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/cpu/mpc85xx/fdt.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index 6ed0284..642f6c5 100644
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -486,4 +486,13 @@ void ft_cpu_setup(void *blob, bd_t *bd)
#ifdef CONFIG_SYS_SRIO
ft_srio_setup(blob);
#endif
+
+ /*
+ * system-clock = CCB clock/2
+ * Here gd->bus_clk = CCB clock
+ * We are using the system clock as 1588 Timer reference
+ * clock source select
+ */
+ do_fixup_by_compat_u32(blob, "fsl,gianfar-ptp-timer",
+ "timer-frequency", gd->bus_clk/2, 1);
}