Merge branch 'master' of git://git.denx.de/u-boot-arm

15 files changed, 1259 insertions, 255 deletions

diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c
index 694841d..b80a389 100644
--- a/arch/arm/cpu/arm926ejs/mx25/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx25/generic.c
@@ -111,7 +111,7 @@ int print_cpuinfo (void)
 	char buf[32];
 
 	printf ("CPU:   Freescale i.MX25 at %s MHz\n\n",
-		strmhz (buf, imx_get_mpllclk ()));
+		strmhz (buf, imx_get_armclk ()));
 	return 0;
 }
 #endif
diff --git a/arch/arm/cpu/arm926ejs/mx27/generic.c b/arch/arm/cpu/arm926ejs/mx27/generic.c
index 30cf544..ae2ce58 100644
--- a/arch/arm/cpu/arm926ejs/mx27/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx27/generic.c
@@ -316,6 +316,23 @@ void mx27_fec_init_pins(void)
 #endif /* CONFIG_FEC_MXC */
 
 #ifdef CONFIG_MXC_MMC
+void mx27_sd1_init_pins(void)
+{
+	int i;
+	unsigned int mode[] = {
+		PE18_PF_SD1_D0,
+		PE19_PF_SD1_D1,
+		PE20_PF_SD1_D2,
+		PE21_PF_SD1_D3,
+		PE22_PF_SD1_CMD,
+		PE23_PF_SD1_CLK,
+	};
+
+	for (i = 0; i < ARRAY_SIZE(mode); i++)
+		imx_gpio_mode(mode[i]);
+
+}
+
 void mx27_sd2_init_pins(void)
 {
 	int i;
diff --git a/arch/arm/cpu/arm_cortexa8/mx51/lowlevel_init.S b/arch/arm/cpu/arm_cortexa8/mx51/lowlevel_init.S
index 31af9e2..783c81f 100644
--- a/arch/arm/cpu/arm_cortexa8/mx51/lowlevel_init.S
+++ b/arch/arm/cpu/arm_cortexa8/mx51/lowlevel_init.S
@@ -158,6 +158,7 @@
 	/* Switch peripheral to PLL 3 */
 	ldr r0, =CCM_BASE_ADDR
 	ldr r1, =0x000010C0
+	orr r1,r1,#CONFIG_SYS_DDR_CLKSEL
 	str r1, [r0, #CLKCTL_CBCMR]
 	ldr r1, =0x13239145
 	str r1, [r0, #CLKCTL_CBCDR]
@@ -171,6 +172,7 @@
 	ldr r1, =0x19239145
 	str r1, [r0, #CLKCTL_CBCDR]
 	ldr r1, =0x000020C0
+	orr r1,r1,#CONFIG_SYS_DDR_CLKSEL
 	str r1, [r0, #CLKCTL_CBCMR]
 
 	mov r3, #DP_OP_216
@@ -201,9 +203,10 @@
 	/* setup the rest */
 	/* Use lp_apm (24MHz) source for perclk */
 	ldr r1, =0x000020C2
+	orr r1,r1,#CONFIG_SYS_DDR_CLKSEL
 	str r1, [r0, #CLKCTL_CBCMR]
 	/* ddr clock from PLL 1, all perclk dividers are 1 since using 24MHz */
-	ldr r1, =0x59E35100
+	ldr r1, =CONFIG_SYS_CLKTL_CBCDR
 	str r1, [r0, #CLKCTL_CBCDR]
 
 	/* Restore the default values in the Gate registers */
diff --git a/arch/arm/cpu/arm_cortexa8/s5pc1xx/Makefile b/arch/arm/cpu/arm_cortexa8/s5pc1xx/Makefile
index 01c93fe..3785593 100644
--- a/arch/arm/cpu/arm_cortexa8/s5pc1xx/Makefile
+++ b/arch/arm/cpu/arm_cortexa8/s5pc1xx/Makefile
@@ -33,7 +33,6 @@ SOBJS	+= reset.o
 
 COBJS	+= clock.o
 COBJS	+= cpu_info.o
-COBJS	+= gpio.o
 COBJS	+= sromc.o
 COBJS	+= timer.o
 
diff --git a/arch/arm/cpu/arm_cortexa8/s5pc1xx/gpio.c b/arch/arm/cpu/arm_cortexa8/s5pc1xx/gpio.c
deleted file mode 100644
index a97244b..0000000
--- a/arch/arm/cpu/arm_cortexa8/s5pc1xx/gpio.c
+++ /dev/null
@@ -1,143 +0,0 @@
-/*
- * (C) Copyright 2009 Samsung Electronics
- * Minkyu Kang <mk7.kang@samsung.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/gpio.h>
-
-#define CON_MASK(x)		(0xf << ((x) << 2))
-#define CON_SFR(x, v)		((v) << ((x) << 2))
-
-#define DAT_MASK(x)		(0x1 << (x))
-#define DAT_SET(x)		(0x1 << (x))
-
-#define PULL_MASK(x)		(0x3 << ((x) << 1))
-#define PULL_MODE(x, v)		((v) << ((x) << 1))
-
-#define DRV_MASK(x)		(0x3 << ((x) << 1))
-#define DRV_SET(x, m)		((m) << ((x) << 1))
-#define RATE_MASK(x)		(0x1 << (x + 16))
-#define RATE_SET(x)		(0x1 << (x + 16))
-
-void gpio_cfg_pin(struct s5pc1xx_gpio_bank *bank, int gpio, int cfg)
-{
-	unsigned int value;
-
-	value = readl(&bank->con);
-	value &= ~CON_MASK(gpio);
-	value |= CON_SFR(gpio, cfg);
-	writel(value, &bank->con);
-}
-
-void gpio_direction_output(struct s5pc1xx_gpio_bank *bank, int gpio, int en)
-{
-	unsigned int value;
-
-	gpio_cfg_pin(bank, gpio, GPIO_OUTPUT);
-
-	value = readl(&bank->dat);
-	value &= ~DAT_MASK(gpio);
-	if (en)
-		value |= DAT_SET(gpio);
-	writel(value, &bank->dat);
-}
-
-void gpio_direction_input(struct s5pc1xx_gpio_bank *bank, int gpio)
-{
-	gpio_cfg_pin(bank, gpio, GPIO_INPUT);
-}
-
-void gpio_set_value(struct s5pc1xx_gpio_bank *bank, int gpio, int en)
-{
-	unsigned int value;
-
-	value = readl(&bank->dat);
-	value &= ~DAT_MASK(gpio);
-	if (en)
-		value |= DAT_SET(gpio);
-	writel(value, &bank->dat);
-}
-
-unsigned int gpio_get_value(struct s5pc1xx_gpio_bank *bank, int gpio)
-{
-	unsigned int value;
-
-	value = readl(&bank->dat);
-	return !!(value & DAT_MASK(gpio));
-}
-
-void gpio_set_pull(struct s5pc1xx_gpio_bank *bank, int gpio, int mode)
-{
-	unsigned int value;
-
-	value = readl(&bank->pull);
-	value &= ~PULL_MASK(gpio);
-
-	switch (mode) {
-	case GPIO_PULL_DOWN:
-	case GPIO_PULL_UP:
-		value |= PULL_MODE(gpio, mode);
-		break;
-	default:
-		return;
-	}
-
-	writel(value, &bank->pull);
-}
-
-void gpio_set_drv(struct s5pc1xx_gpio_bank *bank, int gpio, int mode)
-{
-	unsigned int value;
-
-	value = readl(&bank->drv);
-	value &= ~DRV_MASK(gpio);
-
-	switch (mode) {
-	case GPIO_DRV_1X:
-	case GPIO_DRV_2X:
-	case GPIO_DRV_3X:
-	case GPIO_DRV_4X:
-		value |= DRV_SET(gpio, mode);
-		break;
-	default:
-		return;
-	}
-
-	writel(value, &bank->drv);
-}
-
-void gpio_set_rate(struct s5pc1xx_gpio_bank *bank, int gpio, int mode)
-{
-	unsigned int value;
-
-	value = readl(&bank->drv);
-	value &= ~RATE_MASK(gpio);
-
-	switch (mode) {
-	case GPIO_DRV_FAST:
-	case GPIO_DRV_SLOW:
-		value |= RATE_SET(gpio);
-		break;
-	default:
-		return;
-	}
-
-	writel(value, &bank->drv);
-}
diff --git a/arch/arm/include/asm/arch-at91/at91_matrix.h b/arch/arm/include/asm/arch-at91/at91_matrix.h
index 981ec20..f99b1d4 100644
--- a/arch/arm/include/asm/arch-at91/at91_matrix.h
+++ b/arch/arm/include/asm/arch-at91/at91_matrix.h
@@ -113,4 +113,142 @@ typedef struct at91_matrix {
 
 #define AT91_MATRIX_CSA_EBI1_CS2A	0x00000008
 
+#if defined CONFIG_AT91SAM9261
+/* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
+#define	AT91_MATRIX_MCFG_RCB0	(1 << 0)
+/* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
+#define	AT91_MATRIX_MCFG_RCB1	(1 << 1)
+#endif
+
+/* Undefined Length Burst Type */
+#if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9263) || \
+	defined(CONFIG_AT91SAM9G45)
+#define AT91_MATRIX_MCFG_ULBT_INFINITE	0x00000000
+#define AT91_MATRIX_MCFG_ULBT_SINGLE	0x00000001
+#define AT91_MATRIX_MCFG_ULBT_FOUR	0x00000002
+#define AT91_MATRIX_MCFG_ULBT_EIGHT	0x00000003
+#define AT91_MATRIX_MCFG_ULBT_SIXTEEN	0x00000004
+#endif
+#if defined(CONFIG_AT91SAM9G45)
+#define AT91_MATRIX_MCFG_ULBT_THIRTYTWO	0x00000005
+#define AT91_MATRIX_MCFG_ULBT_SIXTYFOUR	0x00000006
+#define AT91_MATRIX_MCFG_ULBT_128	0x00000007
+#endif
+
+/* Default Master Type */
+#define AT91_MATRIX_SCFG_DEFMSTR_TYPE_NONE	0x00000000
+#define AT91_MATRIX_SCFG_DEFMSTR_TYPE_LAST	0x00010000
+#define AT91_MATRIX_SCFG_DEFMSTR_TYPE_FIXED	0x00020000
+
+/* Fixed Index of Default Master */
+#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9263)
+#define	AT91_MATRIX_SCFG_FIXED_DEFMSTR(x)	((x & 0xf) << 18)
+#elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9260)
+#define	AT91_MATRIX_SCFG_FIXED_DEFMSTR(x)	((x & 7) << 18)
+#endif
+
+/* Maximum Number of Allowed Cycles for a Burst */
+#if defined(CONFIG_AT91SAM9G45)
+#define	AT91_MATRIX_SCFG_SLOT_CYCLE(x)	((x & 0x1ff) << 0)
+#elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
+	defined(CONFIG_AT91SAM9263)
+#define	AT91_MATRIX_SCFG_SLOT_CYCLE(x)	((x & 0xff) << 0)
+#endif
+
+/* Arbitration Type */
+#if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9263)
+#define	AT91_MATRIX_SCFG_ARBT_ROUND_ROBIN	0x00000000
+#define	AT91_MATRIX_SCFG_ARBT_FIXED_PRIORITY	0x01000000
+#endif
+
+/* Master Remap Control Register */
+#if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9263) || \
+	defined(CONFIG_AT91SAM9G45)
+/* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
+#define	AT91_MATRIX_MRCR_RCB0	(1 << 0)
+/* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
+#define	AT91_MATRIX_MRCR_RCB1	(1 << 1)
+#endif
+#if defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G45)
+#define	AT91_MATRIX_MRCR_RCB2	0x00000004
+#define	AT91_MATRIX_MRCR_RCB3	0x00000008
+#define	AT91_MATRIX_MRCR_RCB4	0x00000010
+#define	AT91_MATRIX_MRCR_RCB5	0x00000020
+#define	AT91_MATRIX_MRCR_RCB6	0x00000040
+#define	AT91_MATRIX_MRCR_RCB7	0x00000080
+#define	AT91_MATRIX_MRCR_RCB8	0x00000100
+#endif
+#if defined(CONFIG_AT91SAM9G45)
+#define	AT91_MATRIX_MRCR_RCB9	0x00000200
+#define	AT91_MATRIX_MRCR_RCB10	0x00000400
+#define	AT91_MATRIX_MRCR_RCB11	0x00000800
+#endif
+
+/* TCM Configuration Register */
+#if defined(CONFIG_AT91SAM9G45)
+/* Size of ITCM enabled memory block */
+#define	AT91_MATRIX_TCMR_ITCM_0		0x00000000
+#define	AT91_MATRIX_TCMR_ITCM_32	0x00000040
+/* Size of DTCM enabled memory block */
+#define	AT91_MATRIX_TCMR_DTCM_0		0x00000000
+#define	AT91_MATRIX_TCMR_DTCM_32	0x00000060
+#define	AT91_MATRIX_TCMR_DTCM_64	0x00000070
+/* Wait state TCM register */
+#define	AT91_MATRIX_TCMR_TCM_NO_WS	0x00000000
+#define	AT91_MATRIX_TCMR_TCM_ONE_WS	0x00000800
+#endif
+#if defined(CONFIG_AT91SAM9263)
+/* Size of ITCM enabled memory block */
+#define	AT91_MATRIX_TCMR_ITCM_0		0x00000000
+#define	AT91_MATRIX_TCMR_ITCM_16	0x00000005
+#define	AT91_MATRIX_TCMR_ITCM_32	0x00000006
+/* Size of DTCM enabled memory block */
+#define	AT91_MATRIX_TCMR_DTCM_0		0x00000000
+#define	AT91_MATRIX_TCMR_DTCM_16	0x00000050
+#define	AT91_MATRIX_TCMR_DTCM_32	0x00000060
+#endif
+#if defined(CONFIG_AT91SAM9261)
+/* Size of ITCM enabled memory block */
+#define	AT91_MATRIX_TCMR_ITCM_0		0x00000000
+#define	AT91_MATRIX_TCMR_ITCM_16	0x00000005
+#define	AT91_MATRIX_TCMR_ITCM_32	0x00000006
+#define	AT91_MATRIX_TCMR_ITCM_64	0x00000007
+/* Size of DTCM enabled memory block */
+#define	AT91_MATRIX_TCMR_DTCM_0		0x00000000
+#define	AT91_MATRIX_TCMR_DTCM_16	0x00000050
+#define	AT91_MATRIX_TCMR_DTCM_32	0x00000060
+#define	AT91_MATRIX_TCMR_DTCM_64	0x00000070
+#endif
+
+#if defined(CONFIG_AT91SAM9G45)
+/* Video Mode Configuration Register */
+#define	AT91C_MATRIX_VDEC_SEL_OFF	0x00000000
+#define	AT91C_MATRIX_VDEC_SEL_ON	0x00000001
+/* Write Protect Mode Register */
+#define	AT91_MATRIX_WPMR_WP_WPDIS	0x00000000
+#define	AT91_MATRIX_WPMR_WP_WPEN	0x00000001
+#define	AT91_MATRIX_WPMR_WPKEY		0xFFFFFF00	/* Write Protect KEY */
+/* Write Protect Status Register */
+#define	AT91_MATRIX_WPSR_NO_WPV		0x00000000
+#define	AT91_MATRIX_WPSR_WPV		0x00000001
+#define	AT91_MATRIX_WPSR_WPVSRC		0x00FFFF00	/* Write Protect Violation Source */
+#endif
+
+/* USB Pad Pull-Up Control Register */
+#if defined(CONFIG_AT91SAM9261)
+#define	AT91_MATRIX_USBPUCR_PUON	0x40000000
+#endif
+
+#define AT91_MATRIX_PRA_M0(x)	((x & 3) << 0)	/* Master 0 Priority Reg. A*/
+#define AT91_MATRIX_PRA_M1(x)	((x & 3) << 4)	/* Master 1 Priority Reg. A*/
+#define AT91_MATRIX_PRA_M2(x)	((x & 3) << 8)	/* Master 2 Priority Reg. A*/
+#define AT91_MATRIX_PRA_M3(x)	((x & 3) << 12)	/* Master 3 Priority Reg. A*/
+#define AT91_MATRIX_PRA_M4(x)	((x & 3) << 16)	/* Master 4 Priority Reg. A*/
+#define AT91_MATRIX_PRA_M5(x)	((x & 3) << 20)	/* Master 5 Priority Reg. A*/
+#define AT91_MATRIX_PRA_M6(x)	((x & 3) << 24)	/* Master 6 Priority Reg. A*/
+#define AT91_MATRIX_PRA_M7(x)	((x & 3) << 28)	/* Master 7 Priority Reg. A*/
+#define AT91_MATRIX_PRB_M8(x)	((x & 3) << 0)	/* Master 8 Priority Reg. B) */
+#define AT91_MATRIX_PRB_M9(x)	((x & 3) << 4)	/* Master 9 Priority Reg. B) */
+#define AT91_MATRIX_PRB_M10(x)	((x & 3) << 8)	/* Master 10 Priority Reg. B) */
+
 #endif
diff --git a/arch/arm/include/asm/arch-at91/at91sam9260.h b/arch/arm/include/asm/arch-at91/at91sam9260.h
index a60a081..ec04318 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9260.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9260.h
@@ -56,8 +56,10 @@
 #define AT91_PIO_BASE		0xfffff400
 #define AT91_PMC_BASE		0xfffffc00
 #define AT91_RSTC_BASE		0xfffffd00
+#define AT91_RTT_BASE		0xfffffd20
 #define AT91_PIT_BASE		0xfffffd30
 #define AT91_WDT_BASE		0xfffffd40
+#define AT91_GPR_BASE		0xfffffd50
 
 #ifdef CONFIG_AT91_LEGACY
 
diff --git a/arch/arm/include/asm/arch-at91/at91sam9261.h b/arch/arm/include/asm/arch-at91/at91sam9261.h
index 2952292..7ca0283 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9261.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9261.h
@@ -49,8 +49,10 @@
 #define AT91_PIO_BASE		0xfffff400
 #define AT91_PMC_BASE		0xfffffc00
 #define AT91_RSTC_BASE		0xfffffd00
+#define AT91_RTT_BASE		0xfffffd20
 #define AT91_PIT_BASE		0xfffffd30
 #define AT91_WDT_BASE		0xfffffd40
+#define AT91_GPBR_BASE		0xfffffd50
 
 #ifdef CONFIG_AT91_LEGACY
 
diff --git a/arch/arm/include/asm/arch-at91/at91sam9263.h b/arch/arm/include/asm/arch-at91/at91sam9263.h
index c177bd0..4ada1ce 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9263.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9263.h
@@ -61,8 +61,11 @@
 #define AT91_PIO_BASE		0xfffff200
 #define AT91_PMC_BASE		0xfffffc00
 #define AT91_RSTC_BASE		0xfffffd00
+#define AT91_RTT0_BASE		0xfffffd20
 #define AT91_PIT_BASE		0xfffffd30
 #define AT91_WDT_BASE		0xfffffd40
+#define AT91_RTT1_BASE		0xfffffd50
+#define AT91_GPBR_BASE		0xfffffd60
 
 #ifdef CONFIG_AT91_LEGACY
 
diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h b/arch/arm/include/asm/arch-mx27/imx-regs.h
index d36a6da..6ecddaa 100644
--- a/arch/arm/include/asm/arch-mx27/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx27/imx-regs.h
@@ -37,6 +37,7 @@ extern void mx27_fec_init_pins(void);
 #endif /* CONFIG_FEC_MXC */
 
 #ifdef CONFIG_MXC_MMC
+extern void mx27_sd1_init_pins(void);
 extern void mx27_sd2_init_pins(void);
 #endif /* CONFIG_MXC_MMC */
 
diff --git a/arch/arm/include/asm/arch-mx31/mx31-regs.h b/arch/arm/include/asm/arch-mx31/mx31-regs.h
index 6f6e9a4..d72585c 100644
--- a/arch/arm/include/asm/arch-mx31/mx31-regs.h
+++ b/arch/arm/include/asm/arch-mx31/mx31-regs.h
@@ -207,6 +207,15 @@ struct clock_control_regs {
 #define MUX_CTL_CSPI1_SS0	0x8e
 #define MUX_CTL_CSPI1_SS1	0x8f
 
+#define MUX_CTL_NFC_WP		0xD0
+#define MUX_CTL_NFC_CE		0xD1
+#define MUX_CTL_NFC_RB		0xD2
+#define MUX_CTL_NFC_WE		0xD4
+#define MUX_CTL_NFC_RE		0xD5
+#define MUX_CTL_NFC_ALE		0xD6
+#define MUX_CTL_NFC_CLE		0xD7
+
+
 /*
  * Helper macros for the MUX_[contact name]__[pin function] macros
  */
@@ -294,4 +303,10 @@ struct clock_control_regs {
  */
 #define NFC_BASE_ADDR	0xB8000000
 
+/*
+ * Internal RAM (16KB)
+ */
+#define	IRAM_BASE_ADDR	0x1FFFC000
+#define IRAM_SIZE	(16 * 1024)
+
 #endif /* __ASM_ARCH_MX31_REGS_H */
diff --git a/arch/arm/include/asm/arch-mx31/mx31.h b/arch/arm/include/asm/arch-mx31/mx31.h
index 3cc4b35..f702d26 100644
--- a/arch/arm/include/asm/arch-mx31/mx31.h
+++ b/arch/arm/include/asm/arch-mx31/mx31.h
@@ -37,12 +37,17 @@ enum mx31_gpio_direction {
 extern int mx31_gpio_direction(unsigned int gpio,
 			       enum mx31_gpio_direction direction);
 extern void mx31_gpio_set(unsigned int gpio, unsigned int value);
+extern int mx31_gpio_get(unsigned int gpio);
 #else
 static inline int mx31_gpio_direction(unsigned int gpio,
 				      enum mx31_gpio_direction direction)
 {
 	return 1;
 }
+static inline int mx31_gpio_get(unsigned int gpio)
+{
+	return 1;
+}
 static inline void mx31_gpio_set(unsigned int gpio, unsigned int value)
 {
 }
diff --git a/arch/arm/include/asm/arch-s5pc1xx/gpio.h b/arch/arm/include/asm/arch-s5pc1xx/gpio.h
index 8e4bb86..9a7faed 100644
--- a/arch/arm/include/asm/arch-s5pc1xx/gpio.h
+++ b/arch/arm/include/asm/arch-s5pc1xx/gpio.h
@@ -22,7 +22,7 @@
 #define __ASM_ARCH_GPIO_H
 
 #ifndef __ASSEMBLY__
-struct s5pc1xx_gpio_bank {
+struct s5p_gpio_bank {
 	unsigned int	con;
 	unsigned int	dat;
 	unsigned int	pull;
@@ -33,107 +33,107 @@ struct s5pc1xx_gpio_bank {
 };
 
 struct s5pc100_gpio {
-	struct s5pc1xx_gpio_bank gpio_a0;
-	struct s5pc1xx_gpio_bank gpio_a1;
-	struct s5pc1xx_gpio_bank gpio_b;
-	struct s5pc1xx_gpio_bank gpio_c;
-	struct s5pc1xx_gpio_bank gpio_d;
-	struct s5pc1xx_gpio_bank gpio_e0;
-	struct s5pc1xx_gpio_bank gpio_e1;
-	struct s5pc1xx_gpio_bank gpio_f0;
-	struct s5pc1xx_gpio_bank gpio_f1;
-	struct s5pc1xx_gpio_bank gpio_f2;
-	struct s5pc1xx_gpio_bank gpio_f3;
-	struct s5pc1xx_gpio_bank gpio_g0;
-	struct s5pc1xx_gpio_bank gpio_g1;
-	struct s5pc1xx_gpio_bank gpio_g2;
-	struct s5pc1xx_gpio_bank gpio_g3;
-	struct s5pc1xx_gpio_bank gpio_i;
-	struct s5pc1xx_gpio_bank gpio_j0;
-	struct s5pc1xx_gpio_bank gpio_j1;
-	struct s5pc1xx_gpio_bank gpio_j2;
-	struct s5pc1xx_gpio_bank gpio_j3;
-	struct s5pc1xx_gpio_bank gpio_j4;
-	struct s5pc1xx_gpio_bank gpio_k0;
-	struct s5pc1xx_gpio_bank gpio_k1;
-	struct s5pc1xx_gpio_bank gpio_k2;
-	struct s5pc1xx_gpio_bank gpio_k3;
-	struct s5pc1xx_gpio_bank gpio_l0;
-	struct s5pc1xx_gpio_bank gpio_l1;
-	struct s5pc1xx_gpio_bank gpio_l2;
-	struct s5pc1xx_gpio_bank gpio_l3;
-	struct s5pc1xx_gpio_bank gpio_l4;
-	struct s5pc1xx_gpio_bank gpio_h0;
-	struct s5pc1xx_gpio_bank gpio_h1;
-	struct s5pc1xx_gpio_bank gpio_h2;
-	struct s5pc1xx_gpio_bank gpio_h3;
+	struct s5p_gpio_bank gpio_a0;
+	struct s5p_gpio_bank gpio_a1;
+	struct s5p_gpio_bank gpio_b;
+	struct s5p_gpio_bank gpio_c;
+	struct s5p_gpio_bank gpio_d;
+	struct s5p_gpio_bank gpio_e0;
+	struct s5p_gpio_bank gpio_e1;
+	struct s5p_gpio_bank gpio_f0;
+	struct s5p_gpio_bank gpio_f1;
+	struct s5p_gpio_bank gpio_f2;
+	struct s5p_gpio_bank gpio_f3;
+	struct s5p_gpio_bank gpio_g0;
+	struct s5p_gpio_bank gpio_g1;
+	struct s5p_gpio_bank gpio_g2;
+	struct s5p_gpio_bank gpio_g3;
+	struct s5p_gpio_bank gpio_i;
+	struct s5p_gpio_bank gpio_j0;
+	struct s5p_gpio_bank gpio_j1;
+	struct s5p_gpio_bank gpio_j2;
+	struct s5p_gpio_bank gpio_j3;
+	struct s5p_gpio_bank gpio_j4;
+	struct s5p_gpio_bank gpio_k0;
+	struct s5p_gpio_bank gpio_k1;
+	struct s5p_gpio_bank gpio_k2;
+	struct s5p_gpio_bank gpio_k3;
+	struct s5p_gpio_bank gpio_l0;
+	struct s5p_gpio_bank gpio_l1;
+	struct s5p_gpio_bank gpio_l2;
+	struct s5p_gpio_bank gpio_l3;
+	struct s5p_gpio_bank gpio_l4;
+	struct s5p_gpio_bank gpio_h0;
+	struct s5p_gpio_bank gpio_h1;
+	struct s5p_gpio_bank gpio_h2;
+	struct s5p_gpio_bank gpio_h3;
 };
 
 struct s5pc110_gpio {
-	struct s5pc1xx_gpio_bank gpio_a0;
-	struct s5pc1xx_gpio_bank gpio_a1;
-	struct s5pc1xx_gpio_bank gpio_b;
-	struct s5pc1xx_gpio_bank gpio_c0;
-	struct s5pc1xx_gpio_bank gpio_c1;
-	struct s5pc1xx_gpio_bank gpio_d0;
-	struct s5pc1xx_gpio_bank gpio_d1;
-	struct s5pc1xx_gpio_bank gpio_e0;
-	struct s5pc1xx_gpio_bank gpio_e1;
-	struct s5pc1xx_gpio_bank gpio_f0;
-	struct s5pc1xx_gpio_bank gpio_f1;
-	struct s5pc1xx_gpio_bank gpio_f2;
-	struct s5pc1xx_gpio_bank gpio_f3;
-	struct s5pc1xx_gpio_bank gpio_g0;
-	struct s5pc1xx_gpio_bank gpio_g1;
-	struct s5pc1xx_gpio_bank gpio_g2;
-	struct s5pc1xx_gpio_bank gpio_g3;
-	struct s5pc1xx_gpio_bank gpio_i;
-	struct s5pc1xx_gpio_bank gpio_j0;
-	struct s5pc1xx_gpio_bank gpio_j1;
-	struct s5pc1xx_gpio_bank gpio_j2;
-	struct s5pc1xx_gpio_bank gpio_j3;
-	struct s5pc1xx_gpio_bank gpio_j4;
-	struct s5pc1xx_gpio_bank gpio_mp0_1;
-	struct s5pc1xx_gpio_bank gpio_mp0_2;
-	struct s5pc1xx_gpio_bank gpio_mp0_3;
-	struct s5pc1xx_gpio_bank gpio_mp0_4;
-	struct s5pc1xx_gpio_bank gpio_mp0_5;
-	struct s5pc1xx_gpio_bank gpio_mp0_6;
-	struct s5pc1xx_gpio_bank gpio_mp0_7;
-	struct s5pc1xx_gpio_bank gpio_mp1_0;
-	struct s5pc1xx_gpio_bank gpio_mp1_1;
-	struct s5pc1xx_gpio_bank gpio_mp1_2;
-	struct s5pc1xx_gpio_bank gpio_mp1_3;
-	struct s5pc1xx_gpio_bank gpio_mp1_4;
-	struct s5pc1xx_gpio_bank gpio_mp1_5;
-	struct s5pc1xx_gpio_bank gpio_mp1_6;
-	struct s5pc1xx_gpio_bank gpio_mp1_7;
-	struct s5pc1xx_gpio_bank gpio_mp1_8;
-	struct s5pc1xx_gpio_bank gpio_mp2_0;
-	struct s5pc1xx_gpio_bank gpio_mp2_1;
-	struct s5pc1xx_gpio_bank gpio_mp2_2;
-	struct s5pc1xx_gpio_bank gpio_mp2_3;
-	struct s5pc1xx_gpio_bank gpio_mp2_4;
-	struct s5pc1xx_gpio_bank gpio_mp2_5;
-	struct s5pc1xx_gpio_bank gpio_mp2_6;
-	struct s5pc1xx_gpio_bank gpio_mp2_7;
-	struct s5pc1xx_gpio_bank gpio_mp2_8;
-	struct s5pc1xx_gpio_bank res1[48];
-	struct s5pc1xx_gpio_bank gpio_h0;
-	struct s5pc1xx_gpio_bank gpio_h1;
-	struct s5pc1xx_gpio_bank gpio_h2;
-	struct s5pc1xx_gpio_bank gpio_h3;
+	struct s5p_gpio_bank gpio_a0;
+	struct s5p_gpio_bank gpio_a1;
+	struct s5p_gpio_bank gpio_b;
+	struct s5p_gpio_bank gpio_c0;
+	struct s5p_gpio_bank gpio_c1;
+	struct s5p_gpio_bank gpio_d0;
+	struct s5p_gpio_bank gpio_d1;
+	struct s5p_gpio_bank gpio_e0;
+	struct s5p_gpio_bank gpio_e1;
+	struct s5p_gpio_bank gpio_f0;
+	struct s5p_gpio_bank gpio_f1;
+	struct s5p_gpio_bank gpio_f2;
+	struct s5p_gpio_bank gpio_f3;
+	struct s5p_gpio_bank gpio_g0;
+	struct s5p_gpio_bank gpio_g1;
+	struct s5p_gpio_bank gpio_g2;
+	struct s5p_gpio_bank gpio_g3;
+	struct s5p_gpio_bank gpio_i;
+	struct s5p_gpio_bank gpio_j0;
+	struct s5p_gpio_bank gpio_j1;
+	struct s5p_gpio_bank gpio_j2;
+	struct s5p_gpio_bank gpio_j3;
+	struct s5p_gpio_bank gpio_j4;
+	struct s5p_gpio_bank gpio_mp0_1;
+	struct s5p_gpio_bank gpio_mp0_2;
+	struct s5p_gpio_bank gpio_mp0_3;
+	struct s5p_gpio_bank gpio_mp0_4;
+	struct s5p_gpio_bank gpio_mp0_5;
+	struct s5p_gpio_bank gpio_mp0_6;
+	struct s5p_gpio_bank gpio_mp0_7;
+	struct s5p_gpio_bank gpio_mp1_0;
+	struct s5p_gpio_bank gpio_mp1_1;
+	struct s5p_gpio_bank gpio_mp1_2;
+	struct s5p_gpio_bank gpio_mp1_3;
+	struct s5p_gpio_bank gpio_mp1_4;
+	struct s5p_gpio_bank gpio_mp1_5;
+	struct s5p_gpio_bank gpio_mp1_6;
+	struct s5p_gpio_bank gpio_mp1_7;
+	struct s5p_gpio_bank gpio_mp1_8;
+	struct s5p_gpio_bank gpio_mp2_0;
+	struct s5p_gpio_bank gpio_mp2_1;
+	struct s5p_gpio_bank gpio_mp2_2;
+	struct s5p_gpio_bank gpio_mp2_3;
+	struct s5p_gpio_bank gpio_mp2_4;
+	struct s5p_gpio_bank gpio_mp2_5;
+	struct s5p_gpio_bank gpio_mp2_6;
+	struct s5p_gpio_bank gpio_mp2_7;
+	struct s5p_gpio_bank gpio_mp2_8;
+	struct s5p_gpio_bank res1[48];
+	struct s5p_gpio_bank gpio_h0;
+	struct s5p_gpio_bank gpio_h1;
+	struct s5p_gpio_bank gpio_h2;
+	struct s5p_gpio_bank gpio_h3;
 };
 
 /* functions */
-void gpio_cfg_pin(struct s5pc1xx_gpio_bank *bank, int gpio, int cfg);
-void gpio_direction_output(struct s5pc1xx_gpio_bank *bank, int gpio, int en);
-void gpio_direction_input(struct s5pc1xx_gpio_bank *bank, int gpio);
-void gpio_set_value(struct s5pc1xx_gpio_bank *bank, int gpio, int en);
-unsigned int gpio_get_value(struct s5pc1xx_gpio_bank *bank, int gpio);
-void gpio_set_pull(struct s5pc1xx_gpio_bank *bank, int gpio, int mode);
-void gpio_set_drv(struct s5pc1xx_gpio_bank *bank, int gpio, int mode);
-void gpio_set_rate(struct s5pc1xx_gpio_bank *bank, int gpio, int mode);
+void gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg);
+void gpio_direction_output(struct s5p_gpio_bank *bank, int gpio, int en);
+void gpio_direction_input(struct s5p_gpio_bank *bank, int gpio);
+void gpio_set_value(struct s5p_gpio_bank *bank, int gpio, int en);
+unsigned int gpio_get_value(struct s5p_gpio_bank *bank, int gpio);
+void gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode);
+void gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode);
+void gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode);
 #endif
 
 /* Pin configurations */
diff --git a/arch/arm/include/asm/arch-s5pc1xx/uart.h b/arch/arm/include/asm/arch-s5pc1xx/uart.h
index 140dbdc..2d7ad7e 100644
--- a/arch/arm/include/asm/arch-s5pc1xx/uart.h
+++ b/arch/arm/include/asm/arch-s5pc1xx/uart.h
@@ -24,7 +24,7 @@
 #define __ASM_ARCH_UART_H_
 
 #ifndef __ASSEMBLY__
-struct s5pc1xx_uart {
+struct s5p_uart {
 	unsigned int	ulcon;
 	unsigned int	ucon;
 	unsigned int	ufcon;
diff --git a/arch/arm/include/asm/mach-types.h b/arch/arm/include/asm/mach-types.h
index 4622557..b33e97b 100644
--- a/arch/arm/include/asm/mach-types.h
+++ b/arch/arm/include/asm/mach-types.h
@@ -2659,7 +2659,7 @@ extern unsigned int __machine_arch_type;
 #define MACH_TYPE_AQUILA               2676
 #define MACH_TYPE_SPARK_SLS_HW2        2677
 #define MACH_TYPE_ESATA_SHEEVAPLUG     2678
-#define MACH_TYPE_SURF7X30             2679
+#define MACH_TYPE_MSM7X30_SURF         2679
 #define MACH_TYPE_MICRO2440            2680
 #define MACH_TYPE_AM2440               2681
 #define MACH_TYPE_TQ2440               2682
@@ -2693,12 +2693,86 @@ extern unsigned int __machine_arch_type;
 #define MACH_TYPE_QSD8X50_FFA          2710
 #define MACH_TYPE_QSD8X50A_SURF        2711
 #define MACH_TYPE_QSD8X50A_FFA         2712
-#define MACH_TYPE_XGCP10               2713
+#define MACH_TYPE_ADX_XGCP10           2713
 #define MACH_TYPE_MCGWUMTS2A           2714
 #define MACH_TYPE_MOBIKT               2715
 #define MACH_TYPE_MX53_EVK             2716
 #define MACH_TYPE_IGEP0030             2717
 #define MACH_TYPE_AXELL_H40_H50_CTRL   2718
+#define MACH_TYPE_DTCOMMOD             2719
+#define MACH_TYPE_GOULD                2720
+#define MACH_TYPE_SIBERIA              2721
+#define MACH_TYPE_SBC3530              2722
+#define MACH_TYPE_QARM                 2723
+#define MACH_TYPE_MIPS                 2724
+#define MACH_TYPE_MX27GRB              2725
+#define MACH_TYPE_SBC8100              2726
+#define MACH_TYPE_SAARB                2727
+#define MACH_TYPE_OMAP3MINI            2728
+#define MACH_TYPE_CNMBOOK7SE           2729
+#define MACH_TYPE_CATAN                2730
+#define MACH_TYPE_HARMONY              2731
+#define MACH_TYPE_TONGA                2732
+#define MACH_TYPE_CYBOOK_ORIZON        2733
+#define MACH_TYPE_HTCRHODIUMCDMA       2734
+#define MACH_TYPE_EPC_G45              2735
+#define MACH_TYPE_EPC_LPC3250          2736
+#define MACH_TYPE_MXC91341EVB          2737
+#define MACH_TYPE_RTW1000              2738
+#define MACH_TYPE_BOBCAT               2739
+#define MACH_TYPE_TRIZEPS6             2740
+#define MACH_TYPE_MSM7X30_FLUID        2741
+#define MACH_TYPE_NEDAP9263            2742
+#define MACH_TYPE_NETGEAR_MS2110       2743
+#define MACH_TYPE_BMX                  2744
+#define MACH_TYPE_NETSTREAM            2745
+#define MACH_TYPE_VPNEXT_RCU           2746
+#define MACH_TYPE_VPNEXT_MPU           2747
+#define MACH_TYPE_BCMRING_TABLET_V1    2748
+#define MACH_TYPE_SGARM10              2749
+#define MACH_TYPE_CM_T3517             2750
+#define MACH_TYPE_OMAP3_CPS            2751
+#define MACH_TYPE_AXAR1500_RECEIVER    2752
+#define MACH_TYPE_WBD222               2753
+#define MACH_TYPE_MT65XX               2754
+#define MACH_TYPE_MSM8X60_SURF         2755
+#define MACH_TYPE_MSM8X60_SIM          2756
+#define MACH_TYPE_VMC300               2757
+#define MACH_TYPE_TCC8000_SDK          2758
+#define MACH_TYPE_NANOS                2759
+#define MACH_TYPE_STAMP9G10            2760
+#define MACH_TYPE_STAMP9G45            2761
+#define MACH_TYPE_H6053                2762
+#define MACH_TYPE_SMINT01              2763
+#define MACH_TYPE_PRTLVT2              2764
+#define MACH_TYPE_AP420                2765
+#define MACH_TYPE_HTCSHIFT             2766
+#define MACH_TYPE_DAVINCI_DM365_FC     2767
+#define MACH_TYPE_MSM8X55_SURF         2768
+#define MACH_TYPE_MSM8X55_FFA          2769
+#define MACH_TYPE_ESL_VAMANA           2770
+#define MACH_TYPE_SBC35                2771
+#define MACH_TYPE_MPX6446              2772
+#define MACH_TYPE_OREO_CONTROLLER      2773
+#define MACH_TYPE_KOPIN_MODELS         2774
+#define MACH_TYPE_TTC_VISION2          2775
+#define MACH_TYPE_CNS3420VB            2776
+#define MACH_TYPE_LPC2                 2777
+#define MACH_TYPE_OLYMPUS              2778
+#define MACH_TYPE_VORTEX               2779
+#define MACH_TYPE_S5PC200              2780
+#define MACH_TYPE_ECUCORE_9263         2781
+#define MACH_TYPE_SMDKC200             2782
+#define MACH_TYPE_EMSISO_SX27          2783
+#define MACH_TYPE_APX_SOM9G45_EK       2784
+#define MACH_TYPE_SONGSHAN             2785
+#define MACH_TYPE_TIANSHAN             2786
+#define MACH_TYPE_VPX500               2787
+#define MACH_TYPE_AM3517SAM            2788
+#define MACH_TYPE_SKAT91_SIM508        2789
+#define MACH_TYPE_SKAT91_S3E           2790
+#define MACH_TYPE_OMAP4_PANDA          2791
+#define MACH_TYPE_DF7220               2792
 
 #ifdef CONFIG_ARCH_EBSA110
 # ifdef machine_arch_type
@@ -18343,9 +18417,9 @@ extern unsigned int __machine_arch_type;
 # else
 #  define machine_arch_type	MACH_TYPE_HYNET_INE
 # endif
-# define machine_is_hynet_ine()	(machine_arch_type == MACH_TYPE_HYNET_INE)
+# define machine_is_argonst_foundation()	(machine_arch_type == MACH_TYPE_HYNET_INE)
 #else
-# define machine_is_hynet_ine()	(0)
+# define machine_is_argonst_foundation()	(0)
 #endif
 
 #ifdef CONFIG_MACH_HYNET_APP
@@ -30211,9 +30285,9 @@ extern unsigned int __machine_arch_type;
 # else
 #  define machine_arch_type	MACH_TYPE_OREO
 # endif
-# define machine_is_oreo()	(machine_arch_type == MACH_TYPE_OREO)
+# define machine_is_oreo_camera()	(machine_arch_type == MACH_TYPE_OREO)
 #else
-# define machine_is_oreo()	(0)
+# define machine_is_oreo_camera()	(0)
 #endif
 
 #ifdef CONFIG_MACH_SMDK6442
@@ -34464,14 +34538,14 @@ extern unsigned int __machine_arch_type;
 # define machine_is_sheeva_esata()	(0)
 #endif
 
-#ifdef CONFIG_MACH_SURF7X30
+#ifdef CONFIG_MACH_MSM7X30_SURF
 # ifdef machine_arch_type
 #  undef machine_arch_type
 #  define machine_arch_type	__machine_arch_type
 # else
-#  define machine_arch_type	MACH_TYPE_SURF7X30
+#  define machine_arch_type	MACH_TYPE_MSM7X30_SURF
 # endif
-# define machine_is_msm7x30_surf()	(machine_arch_type == MACH_TYPE_SURF7X30)
+# define machine_is_msm7x30_surf()	(machine_arch_type == MACH_TYPE_MSM7X30_SURF)
 #else
 # define machine_is_msm7x30_surf()	(0)
 #endif
@@ -34872,14 +34946,14 @@ extern unsigned int __machine_arch_type;
 # define machine_is_qsd8x50a_ffa()	(0)
 #endif
 
-#ifdef CONFIG_MACH_XGCP10
+#ifdef CONFIG_MACH_ADX_XGCP10
 # ifdef machine_arch_type
 #  undef machine_arch_type
 #  define machine_arch_type	__machine_arch_type
 # else
-#  define machine_arch_type	MACH_TYPE_XGCP10
+#  define machine_arch_type	MACH_TYPE_ADX_XGCP10
 # endif
-# define machine_is_adx_xgcp10()	(machine_arch_type == MACH_TYPE_XGCP10)
+# define machine_is_adx_xgcp10()	(machine_arch_type == MACH_TYPE_ADX_XGCP10)
 #else
 # define machine_is_adx_xgcp10()	(0)
 #endif
@@ -34944,6 +35018,894 @@ extern unsigned int __machine_arch_type;
 # define machine_is_axell_h40_h50_ctrl()	(0)
 #endif
 
+#ifdef CONFIG_MACH_DTCOMMOD
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_DTCOMMOD
+# endif
+# define machine_is_dtcommod()	(machine_arch_type == MACH_TYPE_DTCOMMOD)
+#else
+# define machine_is_dtcommod()	(0)
+#endif
+
+#ifdef CONFIG_MACH_GOULD
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_GOULD
+# endif
+# define machine_is_gould()	(machine_arch_type == MACH_TYPE_GOULD)
+#else
+# define machine_is_gould()	(0)
+#endif
+
+#ifdef CONFIG_MACH_SIBERIA
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_SIBERIA
+# endif
+# define machine_is_siberia()	(machine_arch_type == MACH_TYPE_SIBERIA)
+#else
+# define machine_is_siberia()	(0)
+#endif
+
+#ifdef CONFIG_MACH_SBC3530
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_SBC3530
+# endif
+# define machine_is_sbc3530()	(machine_arch_type == MACH_TYPE_SBC3530)
+#else
+# define machine_is_sbc3530()	(0)
+#endif
+
+#ifdef CONFIG_MACH_QARM
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_QARM
+# endif
+# define machine_is_qarm()	(machine_arch_type == MACH_TYPE_QARM)
+#else
+# define machine_is_qarm()	(0)
+#endif
+
+#ifdef CONFIG_MACH_MIPS
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_MIPS
+# endif
+# define machine_is_mips()	(machine_arch_type == MACH_TYPE_MIPS)
+#else
+# define machine_is_mips()	(0)
+#endif
+
+#ifdef CONFIG_MACH_MX27GRB
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_MX27GRB
+# endif
+# define machine_is_mx27grb()	(machine_arch_type == MACH_TYPE_MX27GRB)
+#else
+# define machine_is_mx27grb()	(0)
+#endif
+
+#ifdef CONFIG_MACH_SBC8100
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_SBC8100
+# endif
+# define machine_is_sbc8100()	(machine_arch_type == MACH_TYPE_SBC8100)
+#else
+# define machine_is_sbc8100()	(0)
+#endif
+
+#ifdef CONFIG_MACH_SAARB
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_SAARB
+# endif
+# define machine_is_saarb()	(machine_arch_type == MACH_TYPE_SAARB)
+#else
+# define machine_is_saarb()	(0)
+#endif
+
+#ifdef CONFIG_MACH_OMAP3MINI
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_OMAP3MINI
+# endif
+# define machine_is_omap3mini()	(machine_arch_type == MACH_TYPE_OMAP3MINI)
+#else
+# define machine_is_omap3mini()	(0)
+#endif
+
+#ifdef CONFIG_MACH_CNMBOOK7SE
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_CNMBOOK7SE
+# endif
+# define machine_is_cnmbook7se()	(machine_arch_type == MACH_TYPE_CNMBOOK7SE)
+#else
+# define machine_is_cnmbook7se()	(0)
+#endif
+
+#ifdef CONFIG_MACH_CATAN
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_CATAN
+# endif
+# define machine_is_catan()	(machine_arch_type == MACH_TYPE_CATAN)
+#else
+# define machine_is_catan()	(0)
+#endif
+
+#ifdef CONFIG_MACH_HARMONY
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_HARMONY
+# endif
+# define machine_is_harmony()	(machine_arch_type == MACH_TYPE_HARMONY)
+#else
+# define machine_is_harmony()	(0)
+#endif
+
+#ifdef CONFIG_MACH_TONGA
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_TONGA
+# endif
+# define machine_is_tonga()	(machine_arch_type == MACH_TYPE_TONGA)
+#else
+# define machine_is_tonga()	(0)
+#endif
+
+#ifdef CONFIG_MACH_CYBOOK_ORIZON
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_CYBOOK_ORIZON
+# endif
+# define machine_is_cybook_orizon()	(machine_arch_type == MACH_TYPE_CYBOOK_ORIZON)
+#else
+# define machine_is_cybook_orizon()	(0)
+#endif
+
+#ifdef CONFIG_MACH_HTCRHODIUMCDMA
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_HTCRHODIUMCDMA
+# endif
+# define machine_is_htcrhodiumcdma()	(machine_arch_type == MACH_TYPE_HTCRHODIUMCDMA)
+#else
+# define machine_is_htcrhodiumcdma()	(0)
+#endif
+
+#ifdef CONFIG_MACH_EPC_G45
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_EPC_G45
+# endif
+# define machine_is_epc_g45()	(machine_arch_type == MACH_TYPE_EPC_G45)
+#else
+# define machine_is_epc_g45()	(0)
+#endif
+
+#ifdef CONFIG_MACH_EPC_LPC3250
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_EPC_LPC3250
+# endif
+# define machine_is_epc_lpc3250()	(machine_arch_type == MACH_TYPE_EPC_LPC3250)
+#else
+# define machine_is_epc_lpc3250()	(0)
+#endif
+
+#ifdef CONFIG_MACH_MXC91341EVB
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_MXC91341EVB
+# endif
+# define machine_is_mxc91341evb()	(machine_arch_type == MACH_TYPE_MXC91341EVB)
+#else
+# define machine_is_mxc91341evb()	(0)
+#endif
+
+#ifdef CONFIG_MACH_RTW1000
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_RTW1000
+# endif
+# define machine_is_rtw1000()	(machine_arch_type == MACH_TYPE_RTW1000)
+#else
+# define machine_is_rtw1000()	(0)
+#endif
+
+#ifdef CONFIG_MACH_BOBCAT
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_BOBCAT
+# endif
+# define machine_is_bobcat()	(machine_arch_type == MACH_TYPE_BOBCAT)
+#else
+# define machine_is_bobcat()	(0)
+#endif
+
+#ifdef CONFIG_MACH_TRIZEPS6
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_TRIZEPS6
+# endif
+# define machine_is_trizeps6()	(machine_arch_type == MACH_TYPE_TRIZEPS6)
+#else
+# define machine_is_trizeps6()	(0)
+#endif
+
+#ifdef CONFIG_MACH_MSM7X30_FLUID
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_MSM7X30_FLUID
+# endif
+# define machine_is_msm7x30_fluid()	(machine_arch_type == MACH_TYPE_MSM7X30_FLUID)
+#else
+# define machine_is_msm7x30_fluid()	(0)
+#endif
+
+#ifdef CONFIG_MACH_NEDAP9263
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_NEDAP9263
+# endif
+# define machine_is_nedap9263()	(machine_arch_type == MACH_TYPE_NEDAP9263)
+#else
+# define machine_is_nedap9263()	(0)
+#endif
+
+#ifdef CONFIG_MACH_NETGEAR_MS2110
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_NETGEAR_MS2110
+# endif
+# define machine_is_netgear_ms2110()	(machine_arch_type == MACH_TYPE_NETGEAR_MS2110)
+#else
+# define machine_is_netgear_ms2110()	(0)
+#endif
+
+#ifdef CONFIG_MACH_BMX
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_BMX
+# endif
+# define machine_is_bmx()	(machine_arch_type == MACH_TYPE_BMX)
+#else
+# define machine_is_bmx()	(0)
+#endif
+
+#ifdef CONFIG_MACH_NETSTREAM
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_NETSTREAM
+# endif
+# define machine_is_netstream()	(machine_arch_type == MACH_TYPE_NETSTREAM)
+#else
+# define machine_is_netstream()	(0)
+#endif
+
+#ifdef CONFIG_MACH_VPNEXT_RCU
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_VPNEXT_RCU
+# endif
+# define machine_is_vpnext_rcu()	(machine_arch_type == MACH_TYPE_VPNEXT_RCU)
+#else
+# define machine_is_vpnext_rcu()	(0)
+#endif
+
+#ifdef CONFIG_MACH_VPNEXT_MPU
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_VPNEXT_MPU
+# endif
+# define machine_is_vpnext_mpu()	(machine_arch_type == MACH_TYPE_VPNEXT_MPU)
+#else
+# define machine_is_vpnext_mpu()	(0)
+#endif
+
+#ifdef CONFIG_MACH_BCMRING_TABLET_V1
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_BCMRING_TABLET_V1
+# endif
+# define machine_is_bcmring_tablet_v1()	(machine_arch_type == MACH_TYPE_BCMRING_TABLET_V1)
+#else
+# define machine_is_bcmring_tablet_v1()	(0)
+#endif
+
+#ifdef CONFIG_MACH_SGARM10
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_SGARM10
+# endif
+# define machine_is_sgarm10()	(machine_arch_type == MACH_TYPE_SGARM10)
+#else
+# define machine_is_sgarm10()	(0)
+#endif
+
+#ifdef CONFIG_MACH_CM_T3517
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_CM_T3517
+# endif
+# define machine_is_cm_t3517()	(machine_arch_type == MACH_TYPE_CM_T3517)
+#else
+# define machine_is_cm_t3517()	(0)
+#endif
+
+#ifdef CONFIG_MACH_OMAP3_CPS
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_OMAP3_CPS
+# endif
+# define machine_is_omap3_cps()	(machine_arch_type == MACH_TYPE_OMAP3_CPS)
+#else
+# define machine_is_omap3_cps()	(0)
+#endif
+
+#ifdef CONFIG_MACH_AXAR1500_RECEIVER
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_AXAR1500_RECEIVER
+# endif
+# define machine_is_axar1500_receiver()	(machine_arch_type == MACH_TYPE_AXAR1500_RECEIVER)
+#else
+# define machine_is_axar1500_receiver()	(0)
+#endif
+
+#ifdef CONFIG_MACH_WBD222
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_WBD222
+# endif
+# define machine_is_wbd222()	(machine_arch_type == MACH_TYPE_WBD222)
+#else
+# define machine_is_wbd222()	(0)
+#endif
+
+#ifdef CONFIG_MACH_MT65XX
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_MT65XX
+# endif
+# define machine_is_mt65xx()	(machine_arch_type == MACH_TYPE_MT65XX)
+#else
+# define machine_is_mt65xx()	(0)
+#endif
+
+#ifdef CONFIG_MACH_MSM8X60_SURF
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_MSM8X60_SURF
+# endif
+# define machine_is_msm8x60_surf()	(machine_arch_type == MACH_TYPE_MSM8X60_SURF)
+#else
+# define machine_is_msm8x60_surf()	(0)
+#endif
+
+#ifdef CONFIG_MACH_MSM8X60_SIM
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_MSM8X60_SIM
+# endif
+# define machine_is_msm8x60_sim()	(machine_arch_type == MACH_TYPE_MSM8X60_SIM)
+#else
+# define machine_is_msm8x60_sim()	(0)
+#endif
+
+#ifdef CONFIG_MACH_VMC300
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_VMC300
+# endif
+# define machine_is_vmc300()	(machine_arch_type == MACH_TYPE_VMC300)
+#else
+# define machine_is_vmc300()	(0)
+#endif
+
+#ifdef CONFIG_MACH_TCC8000_SDK
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_TCC8000_SDK
+# endif
+# define machine_is_tcc8000_sdk()	(machine_arch_type == MACH_TYPE_TCC8000_SDK)
+#else
+# define machine_is_tcc8000_sdk()	(0)
+#endif
+
+#ifdef CONFIG_MACH_NANOS
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_NANOS
+# endif
+# define machine_is_nanos()	(machine_arch_type == MACH_TYPE_NANOS)
+#else
+# define machine_is_nanos()	(0)
+#endif
+
+#ifdef CONFIG_MACH_STAMP9G10
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_STAMP9G10
+# endif
+# define machine_is_stamp9g10()	(machine_arch_type == MACH_TYPE_STAMP9G10)
+#else
+# define machine_is_stamp9g10()	(0)
+#endif
+
+#ifdef CONFIG_MACH_STAMP9G45
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_STAMP9G45
+# endif
+# define machine_is_stamp9g45()	(machine_arch_type == MACH_TYPE_STAMP9G45)
+#else
+# define machine_is_stamp9g45()	(0)
+#endif
+
+#ifdef CONFIG_MACH_H6053
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_H6053
+# endif
+# define machine_is_h6053()	(machine_arch_type == MACH_TYPE_H6053)
+#else
+# define machine_is_h6053()	(0)
+#endif
+
+#ifdef CONFIG_MACH_SMINT01
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_SMINT01
+# endif
+# define machine_is_smint01()	(machine_arch_type == MACH_TYPE_SMINT01)
+#else
+# define machine_is_smint01()	(0)
+#endif
+
+#ifdef CONFIG_MACH_PRTLVT2
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_PRTLVT2
+# endif
+# define machine_is_prtlvt2()	(machine_arch_type == MACH_TYPE_PRTLVT2)
+#else
+# define machine_is_prtlvt2()	(0)
+#endif
+
+#ifdef CONFIG_MACH_AP420
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_AP420
+# endif
+# define machine_is_ap420()	(machine_arch_type == MACH_TYPE_AP420)
+#else
+# define machine_is_ap420()	(0)
+#endif
+
+#ifdef CONFIG_MACH_HTCSHIFT
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_HTCSHIFT
+# endif
+# define machine_is_htcclio()	(machine_arch_type == MACH_TYPE_HTCSHIFT)
+#else
+# define machine_is_htcclio()	(0)
+#endif
+
+#ifdef CONFIG_MACH_DAVINCI_DM365_FC
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_DAVINCI_DM365_FC
+# endif
+# define machine_is_davinci_dm365_fc()	(machine_arch_type == MACH_TYPE_DAVINCI_DM365_FC)
+#else
+# define machine_is_davinci_dm365_fc()	(0)
+#endif
+
+#ifdef CONFIG_MACH_MSM8X55_SURF
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_MSM8X55_SURF
+# endif
+# define machine_is_msm8x55_surf()	(machine_arch_type == MACH_TYPE_MSM8X55_SURF)
+#else
+# define machine_is_msm8x55_surf()	(0)
+#endif
+
+#ifdef CONFIG_MACH_MSM8X55_FFA
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_MSM8X55_FFA
+# endif
+# define machine_is_msm8x55_ffa()	(machine_arch_type == MACH_TYPE_MSM8X55_FFA)
+#else
+# define machine_is_msm8x55_ffa()	(0)
+#endif
+
+#ifdef CONFIG_MACH_ESL_VAMANA
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_ESL_VAMANA
+# endif
+# define machine_is_esl_vamana()	(machine_arch_type == MACH_TYPE_ESL_VAMANA)
+#else
+# define machine_is_esl_vamana()	(0)
+#endif
+
+#ifdef CONFIG_MACH_SBC35
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_SBC35
+# endif
+# define machine_is_sbc35()	(machine_arch_type == MACH_TYPE_SBC35)
+#else
+# define machine_is_sbc35()	(0)
+#endif
+
+#ifdef CONFIG_MACH_MPX6446
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_MPX6446
+# endif
+# define machine_is_mpx6446()	(machine_arch_type == MACH_TYPE_MPX6446)
+#else
+# define machine_is_mpx6446()	(0)
+#endif
+
+#ifdef CONFIG_MACH_OREO_CONTROLLER
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_OREO_CONTROLLER
+# endif
+# define machine_is_oreo_controller()	(machine_arch_type == MACH_TYPE_OREO_CONTROLLER)
+#else
+# define machine_is_oreo_controller()	(0)
+#endif
+
+#ifdef CONFIG_MACH_KOPIN_MODELS
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_KOPIN_MODELS
+# endif
+# define machine_is_kopin_models()	(machine_arch_type == MACH_TYPE_KOPIN_MODELS)
+#else
+# define machine_is_kopin_models()	(0)
+#endif
+
+#ifdef CONFIG_MACH_TTC_VISION2
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_TTC_VISION2
+# endif
+# define machine_is_ttc_vision2()	(machine_arch_type == MACH_TYPE_TTC_VISION2)
+#else
+# define machine_is_ttc_vision2()	(0)
+#endif
+
+#ifdef CONFIG_MACH_CNS3420VB
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_CNS3420VB
+# endif
+# define machine_is_cns3420vb()	(machine_arch_type == MACH_TYPE_CNS3420VB)
+#else
+# define machine_is_cns3420vb()	(0)
+#endif
+
+#ifdef CONFIG_MACH_LPC2
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_LPC2
+# endif
+# define machine_is_lpc2()	(machine_arch_type == MACH_TYPE_LPC2)
+#else
+# define machine_is_lpc2()	(0)
+#endif
+
+#ifdef CONFIG_MACH_OLYMPUS
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_OLYMPUS
+# endif
+# define machine_is_olympus()	(machine_arch_type == MACH_TYPE_OLYMPUS)
+#else
+# define machine_is_olympus()	(0)
+#endif
+
+#ifdef CONFIG_MACH_VORTEX
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_VORTEX
+# endif
+# define machine_is_vortex()	(machine_arch_type == MACH_TYPE_VORTEX)
+#else
+# define machine_is_vortex()	(0)
+#endif
+
+#ifdef CONFIG_MACH_S5PC200
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_S5PC200
+# endif
+# define machine_is_s5pc200()	(machine_arch_type == MACH_TYPE_S5PC200)
+#else
+# define machine_is_s5pc200()	(0)
+#endif
+
+#ifdef CONFIG_MACH_ECUCORE_9263
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_ECUCORE_9263
+# endif
+# define machine_is_ecucore_9263()	(machine_arch_type == MACH_TYPE_ECUCORE_9263)
+#else
+# define machine_is_ecucore_9263()	(0)
+#endif
+
+#ifdef CONFIG_MACH_SMDKC200
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_SMDKC200
+# endif
+# define machine_is_smdkc200()	(machine_arch_type == MACH_TYPE_SMDKC200)
+#else
+# define machine_is_smdkc200()	(0)
+#endif
+
+#ifdef CONFIG_MACH_EMSISO_SX27
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_EMSISO_SX27
+# endif
+# define machine_is_emsiso_sx27()	(machine_arch_type == MACH_TYPE_EMSISO_SX27)
+#else
+# define machine_is_emsiso_sx27()	(0)
+#endif
+
+#ifdef CONFIG_MACH_APX_SOM9G45_EK
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_APX_SOM9G45_EK
+# endif
+# define machine_is_apx_som9g45_ek()	(machine_arch_type == MACH_TYPE_APX_SOM9G45_EK)
+#else
+# define machine_is_apx_som9g45_ek()	(0)
+#endif
+
+#ifdef CONFIG_MACH_SONGSHAN
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_SONGSHAN
+# endif
+# define machine_is_songshan()	(machine_arch_type == MACH_TYPE_SONGSHAN)
+#else
+# define machine_is_songshan()	(0)
+#endif
+
+#ifdef CONFIG_MACH_TIANSHAN
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_TIANSHAN
+# endif
+# define machine_is_tianshan()	(machine_arch_type == MACH_TYPE_TIANSHAN)
+#else
+# define machine_is_tianshan()	(0)
+#endif
+
+#ifdef CONFIG_MACH_VPX500
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_VPX500
+# endif
+# define machine_is_vpx500()	(machine_arch_type == MACH_TYPE_VPX500)
+#else
+# define machine_is_vpx500()	(0)
+#endif
+
+#ifdef CONFIG_MACH_AM3517SAM
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_AM3517SAM
+# endif
+# define machine_is_am3517sam()	(machine_arch_type == MACH_TYPE_AM3517SAM)
+#else
+# define machine_is_am3517sam()	(0)
+#endif
+
+#ifdef CONFIG_MACH_SKAT91_SIM508
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_SKAT91_SIM508
+# endif
+# define machine_is_skat91_sim508()	(machine_arch_type == MACH_TYPE_SKAT91_SIM508)
+#else
+# define machine_is_skat91_sim508()	(0)
+#endif
+
+#ifdef CONFIG_MACH_SKAT91_S3E
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_SKAT91_S3E
+# endif
+# define machine_is_skat91_s3e()	(machine_arch_type == MACH_TYPE_SKAT91_S3E)
+#else
+# define machine_is_skat91_s3e()	(0)
+#endif
+
+#ifdef CONFIG_MACH_OMAP4_PANDA
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_OMAP4_PANDA
+# endif
+# define machine_is_omap4_panda()	(machine_arch_type == MACH_TYPE_OMAP4_PANDA)
+#else
+# define machine_is_omap4_panda()	(0)
+#endif
+
+#ifdef CONFIG_MACH_DF7220
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_DF7220
+# endif
+# define machine_is_df7220()	(machine_arch_type == MACH_TYPE_DF7220)
+#else
+# define machine_is_df7220()	(0)
+#endif
+
 /*
  * These have not yet been registered
  */