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authorNitin Garg <nitin.garg@freescale.com>2014-02-17 18:01:42 -0600
committerNitin Garg <nitin.garg@freescale.com>2014-02-17 18:01:42 -0600
commitdc5718839b6da081100e6e1af97158c4a26548c4 (patch)
tree38a2df27bb8530dd12960f565e2aced140b38714 /arch
parent5d1ab5052a85b0b9b43482ae7bc5e8604e618667 (diff)
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ENGR00298503-1: Remove SATA and IPU clk function for iMX6SX
Since SATA and IPU doesn't exists on iMX6SX, remove those clk functions. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/cpu/armv7/mx6/clock.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index 9e7352b..23f3091 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -395,6 +395,7 @@ u32 imx_get_fecclk(void)
return decode_pll(PLL_ENET, MXC_HCLK);
}
+#ifndef CONFIG_MX6SX
int enable_sata_clock(void)
{
u32 reg = 0;
@@ -425,6 +426,7 @@ int enable_sata_clock(void)
return 0 ;
}
+#endif
unsigned int mxc_get_clock(enum mxc_clock clk)
{
@@ -501,6 +503,7 @@ int do_mx6_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
return 0;
}
+#ifndef CONFIG_MX6SX
void enable_ipu_clock(void)
{
struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
@@ -509,6 +512,7 @@ void enable_ipu_clock(void)
reg |= MXC_CCM_CCGR3_IPU1_IPU_MASK;
writel(reg, &mxc_ccm->CCGR3);
}
+#endif
/***************************************************/
U_BOOT_CMD(