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authorAlbert ARIBAUD <albert.u.boot@aribaud.net>2014-07-01 15:11:18 +0200
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2014-07-01 15:11:18 +0200
commite99f30e105a253ee64bef1ef83b86a47e0d3b6f1 (patch)
tree847e087ca50c1d0a02b750577b13af45aa498361 /arch
parentd6694aff569a0838a9d0ef352128f5aa309d73ff (diff)
parent12cc54376768461533b55ada1b0b6d4979f40579 (diff)
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Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c2
-rw-r--r--arch/arm/cpu/arm926ejs/davinci/dm365_lowlevel.c1
-rw-r--r--arch/arm/cpu/armv7/am33xx/ddr.c1
-rw-r--r--arch/arm/cpu/armv7/keystone/Makefile1
-rw-r--r--arch/arm/cpu/armv7/keystone/aemif.c71
-rw-r--r--arch/arm/cpu/armv7/omap-common/mem-common.c6
-rw-r--r--arch/arm/cpu/armv7/omap3/board.c4
-rw-r--r--arch/arm/include/asm/arch-davinci/emif_defs.h72
-rw-r--r--arch/arm/include/asm/arch-davinci/hardware.h1
-rw-r--r--arch/arm/include/asm/arch-davinci/nand_defs.h38
-rw-r--r--arch/arm/include/asm/arch-keystone/hardware-k2hk.h7
-rw-r--r--arch/arm/include/asm/arch-keystone/hardware.h30
-rw-r--r--arch/arm/include/asm/arch-keystone/nand_defs.h23
-rw-r--r--arch/arm/include/asm/arch-tnetv107x/emif_defs.h1
-rw-r--r--arch/arm/include/asm/arch-tnetv107x/hardware.h2
-rw-r--r--arch/arm/include/asm/arch-tnetv107x/nand_defs.h23
-rw-r--r--arch/arm/include/asm/ti-common/davinci_nand.h (renamed from arch/arm/include/asm/arch-keystone/emif_defs.h)55
-rw-r--r--arch/arm/include/asm/ti-common/ti-aemif.h39
18 files changed, 94 insertions, 283 deletions
diff --git a/arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c b/arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c
index b91e948..19730ce 100644
--- a/arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c
+++ b/arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c
@@ -14,7 +14,7 @@
#include <asm/arch/hardware.h>
#include <asm/arch/davinci_misc.h>
#include <asm/arch/ddr2_defs.h>
-#include <asm/arch/emif_defs.h>
+#include <asm/ti-common/davinci_nand.h>
#include <asm/arch/pll_defs.h>
void davinci_enable_uart0(void)
diff --git a/arch/arm/cpu/arm926ejs/davinci/dm365_lowlevel.c b/arch/arm/cpu/arm926ejs/davinci/dm365_lowlevel.c
index ee096fe..c8b4498 100644
--- a/arch/arm/cpu/arm926ejs/davinci/dm365_lowlevel.c
+++ b/arch/arm/cpu/arm926ejs/davinci/dm365_lowlevel.c
@@ -11,6 +11,7 @@
#include <nand.h>
#include <ns16550.h>
#include <post.h>
+#include <asm/ti-common/davinci_nand.h>
#include <asm/arch/dm365_lowlevel.h>
#include <asm/arch/hardware.h>
diff --git a/arch/arm/cpu/armv7/am33xx/ddr.c b/arch/arm/cpu/armv7/am33xx/ddr.c
index 9a625c4..bbe9d1a 100644
--- a/arch/arm/cpu/armv7/am33xx/ddr.c
+++ b/arch/arm/cpu/armv7/am33xx/ddr.c
@@ -95,6 +95,7 @@ void config_sdram_emif4d5(const struct emif_regs *regs, int nr)
&emif_reg[nr]->emif_rd_wr_exec_thresh);
writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl);
+ writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl_shdw);
writel(regs->sdram_config, &emif_reg[nr]->emif_sdram_config);
writel(regs->sdram_config, &cstat->secure_emif_sdram_config);
diff --git a/arch/arm/cpu/armv7/keystone/Makefile b/arch/arm/cpu/armv7/keystone/Makefile
index b1bd022..c4af252 100644
--- a/arch/arm/cpu/armv7/keystone/Makefile
+++ b/arch/arm/cpu/armv7/keystone/Makefile
@@ -5,7 +5,6 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-y += aemif.o
obj-y += init.o
obj-y += psc.o
obj-y += clock.o
diff --git a/arch/arm/cpu/armv7/keystone/aemif.c b/arch/arm/cpu/armv7/keystone/aemif.c
deleted file mode 100644
index 9b26886..0000000
--- a/arch/arm/cpu/armv7/keystone/aemif.c
+++ /dev/null
@@ -1,71 +0,0 @@
-/*
- * Keystone2: Asynchronous EMIF Configuration
- *
- * (C) Copyright 2012-2014
- * Texas Instruments Incorporated, <www.ti.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/emif_defs.h>
-
-#define AEMIF_CFG_SELECT_STROBE(v) ((v) ? 1 << 31 : 0)
-#define AEMIF_CFG_EXTEND_WAIT(v) ((v) ? 1 << 30 : 0)
-#define AEMIF_CFG_WR_SETUP(v) (((v) & 0x0f) << 26)
-#define AEMIF_CFG_WR_STROBE(v) (((v) & 0x3f) << 20)
-#define AEMIF_CFG_WR_HOLD(v) (((v) & 0x07) << 17)
-#define AEMIF_CFG_RD_SETUP(v) (((v) & 0x0f) << 13)
-#define AEMIF_CFG_RD_STROBE(v) (((v) & 0x3f) << 7)
-#define AEMIF_CFG_RD_HOLD(v) (((v) & 0x07) << 4)
-#define AEMIF_CFG_TURN_AROUND(v) (((v) & 0x03) << 2)
-#define AEMIF_CFG_WIDTH(v) (((v) & 0x03) << 0)
-
-#define set_config_field(reg, field, val) \
- do { \
- if (val != -1) { \
- reg &= ~AEMIF_CFG_##field(0xffffffff); \
- reg |= AEMIF_CFG_##field(val); \
- } \
- } while (0)
-
-void configure_async_emif(int cs, struct async_emif_config *cfg)
-{
- unsigned long tmp;
-
- if (cfg->mode == ASYNC_EMIF_MODE_NAND) {
- tmp = __raw_readl(&davinci_emif_regs->nandfcr);
- tmp |= (1 << cs);
- __raw_writel(tmp, &davinci_emif_regs->nandfcr);
-
- } else if (cfg->mode == ASYNC_EMIF_MODE_ONENAND) {
- tmp = __raw_readl(&davinci_emif_regs->one_nand_cr);
- tmp |= (1 << cs);
- __raw_writel(tmp, &davinci_emif_regs->one_nand_cr);
- }
-
- tmp = __raw_readl(&davinci_emif_regs->abncr[cs]);
-
- set_config_field(tmp, SELECT_STROBE, cfg->select_strobe);
- set_config_field(tmp, EXTEND_WAIT, cfg->extend_wait);
- set_config_field(tmp, WR_SETUP, cfg->wr_setup);
- set_config_field(tmp, WR_STROBE, cfg->wr_strobe);
- set_config_field(tmp, WR_HOLD, cfg->wr_hold);
- set_config_field(tmp, RD_SETUP, cfg->rd_setup);
- set_config_field(tmp, RD_STROBE, cfg->rd_strobe);
- set_config_field(tmp, RD_HOLD, cfg->rd_hold);
- set_config_field(tmp, TURN_AROUND, cfg->turn_around);
- set_config_field(tmp, WIDTH, cfg->width);
-
- __raw_writel(tmp, &davinci_emif_regs->abncr[cs]);
-}
-
-void init_async_emif(int num_cs, struct async_emif_config *config)
-{
- int cs;
-
- for (cs = 0; cs < num_cs; cs++)
- configure_async_emif(cs, config + cs);
-}
diff --git a/arch/arm/cpu/armv7/omap-common/mem-common.c b/arch/arm/cpu/armv7/omap-common/mem-common.c
index 944ef84..5bc7e1f 100644
--- a/arch/arm/cpu/armv7/omap-common/mem-common.c
+++ b/arch/arm/cpu/armv7/omap-common/mem-common.c
@@ -121,7 +121,8 @@ void gpmc_init(void)
writel(0x00000008, &gpmc_cfg->sysconfig);
writel(0x00000000, &gpmc_cfg->irqstatus);
writel(0x00000000, &gpmc_cfg->irqenable);
- writel(0x00000000, &gpmc_cfg->timeout_control);
+ /* disable timeout, set a safe reset value */
+ writel(0x00001ff0, &gpmc_cfg->timeout_control);
#ifdef CONFIG_NOR
writel(0x00000200, &gpmc_cfg->config);
#else
@@ -133,5 +134,6 @@ void gpmc_init(void)
writel(0, &gpmc_cfg->cs[0].config7);
sdelay(1000);
/* enable chip-select specific configurations */
- enable_gpmc_cs_config(gpmc_regs, &gpmc_cfg->cs[0], base, size);
+ if (base != 0)
+ enable_gpmc_cs_config(gpmc_regs, &gpmc_cfg->cs[0], base, size);
}
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index e252e7f..667e77f 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -147,7 +147,7 @@ void secure_unlock_mem(void)
* configure secure registers and exit secure world
* general use.
*****************************************************************************/
-void secureworld_exit()
+void secureworld_exit(void)
{
unsigned long i;
@@ -178,7 +178,7 @@ void secureworld_exit()
* Description: If chip is GP/EMU(special) type, unlock the SRAM for
* general use.
*****************************************************************************/
-void try_unlock_memory()
+void try_unlock_memory(void)
{
int mode;
int in_sdram = is_running_in_sdram();
diff --git a/arch/arm/include/asm/arch-davinci/emif_defs.h b/arch/arm/include/asm/arch-davinci/emif_defs.h
deleted file mode 100644
index 7e19cfe..0000000
--- a/arch/arm/include/asm/arch-davinci/emif_defs.h
+++ /dev/null
@@ -1,72 +0,0 @@
-/*
- * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-#ifndef _EMIF_DEFS_H_
-#define _EMIF_DEFS_H_
-
-#include <asm/arch/hardware.h>
-
-struct davinci_emif_regs {
- u_int32_t ercsr;
- u_int32_t awccr;
- u_int32_t sdbcr;
- u_int32_t sdrcr;
- u_int32_t ab1cr;
- u_int32_t ab2cr;
- u_int32_t ab3cr;
- u_int32_t ab4cr;
- u_int32_t sdtimr;
- u_int32_t ddrsr;
- u_int32_t ddrphycr;
- u_int32_t ddrphysr;
- u_int32_t totar;
- u_int32_t totactr;
- u_int32_t ddrphyid_rev;
- u_int32_t sdsretr;
- u_int32_t eirr;
- u_int32_t eimr;
- u_int32_t eimsr;
- u_int32_t eimcr;
- u_int32_t ioctrlr;
- u_int32_t iostatr;
- u_int8_t rsvd0[8];
- u_int32_t nandfcr;
- u_int32_t nandfsr;
- u_int8_t rsvd1[8];
- u_int32_t nandfecc[4];
- u_int8_t rsvd2[60];
- u_int32_t nand4biteccload;
- u_int32_t nand4bitecc[4];
- u_int32_t nanderradd1;
- u_int32_t nanderradd2;
- u_int32_t nanderrval1;
- u_int32_t nanderrval2;
-};
-
-#define davinci_emif_regs \
- ((struct davinci_emif_regs *)DAVINCI_ASYNC_EMIF_CNTRL_BASE)
-
-#define DAVINCI_NANDFCR_NAND_ENABLE(n) (1 << (n-2))
-#define DAVINCI_NANDFCR_4BIT_ECC_SEL_MASK (3 << 4)
-#define DAVINCI_NANDFCR_4BIT_ECC_SEL(n) ((n-2) << 4)
-#define DAVINCI_NANDFCR_1BIT_ECC_START(n) (1 << (8 + (n-2)))
-#define DAVINCI_NANDFCR_4BIT_ECC_START (1 << 12)
-#define DAVINCI_NANDFCR_4BIT_CALC_START (1 << 13)
-#define DAVINCI_NANDFCR_CS2NAND (1 << 0)
-
-/* Chip Select setup */
-#define DAVINCI_ABCR_STROBE_SELECT (1 << 31)
-#define DAVINCI_ABCR_EXT_WAIT (1 << 30)
-#define DAVINCI_ABCR_WSETUP(n) (n << 26)
-#define DAVINCI_ABCR_WSTROBE(n) (n << 20)
-#define DAVINCI_ABCR_WHOLD(n) (n << 17)
-#define DAVINCI_ABCR_RSETUP(n) (n << 13)
-#define DAVINCI_ABCR_RSTROBE(n) (n << 7)
-#define DAVINCI_ABCR_RHOLD(n) (n << 4)
-#define DAVINCI_ABCR_TA(n) (n << 2)
-#define DAVINCI_ABCR_ASIZE_16BIT 1
-#define DAVINCI_ABCR_ASIZE_8BIT 0
-
-#endif
diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h
index 98fe56e..a4eb0bd 100644
--- a/arch/arm/include/asm/arch-davinci/hardware.h
+++ b/arch/arm/include/asm/arch-davinci/hardware.h
@@ -597,7 +597,6 @@ static inline enum davinci_clk_ids get_async3_src(void)
#if defined(CONFIG_SOC_DM365)
#include <asm/arch/aintc_defs.h>
#include <asm/arch/ddr2_defs.h>
-#include <asm/arch/emif_defs.h>
#include <asm/arch/gpio.h>
#include <asm/arch/pll_defs.h>
#include <asm/arch/psc_defs.h>
diff --git a/arch/arm/include/asm/arch-davinci/nand_defs.h b/arch/arm/include/asm/arch-davinci/nand_defs.h
deleted file mode 100644
index dee1c6f..0000000
--- a/arch/arm/include/asm/arch-davinci/nand_defs.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
- *
- * Parts shamelesly stolen from Linux Kernel source tree.
- *
- * ------------------------------------------------------------
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-#ifndef _NAND_DEFS_H_
-#define _NAND_DEFS_H_
-
-#include <asm/arch/hardware.h>
-
-#ifdef CONFIG_SOC_DM646X
-#define MASK_CLE 0x80000
-#define MASK_ALE 0x40000
-#else
-#define MASK_CLE 0x10
-#define MASK_ALE 0x08
-#endif
-
-#ifdef CONFIG_SYS_NAND_MASK_CLE
-#undef MASK_CLE
-#define MASK_CLE CONFIG_SYS_NAND_MASK_CLE
-#endif
-#ifdef CONFIG_SYS_NAND_MASK_ALE
-#undef MASK_ALE
-#define MASK_ALE CONFIG_SYS_NAND_MASK_ALE
-#endif
-
-#define NAND_READ_START 0x00
-#define NAND_READ_END 0x30
-#define NAND_STATUS 0x70
-
-extern void davinci_nand_init(struct nand_chip *nand);
-
-#endif
diff --git a/arch/arm/include/asm/arch-keystone/hardware-k2hk.h b/arch/arm/include/asm/arch-keystone/hardware-k2hk.h
index 7ac2662..50ce649 100644
--- a/arch/arm/include/asm/arch-keystone/hardware-k2hk.h
+++ b/arch/arm/include/asm/arch-keystone/hardware-k2hk.h
@@ -9,13 +9,6 @@
#ifndef __ASM_ARCH_HARDWARE_K2HK_H
#define __ASM_ARCH_HARDWARE_K2HK_H
-#define K2HK_ASYNC_EMIF_CNTRL_BASE 0x21000a00
-#define DAVINCI_ASYNC_EMIF_CNTRL_BASE K2HK_ASYNC_EMIF_CNTRL_BASE
-#define K2HK_ASYNC_EMIF_DATA_CE0_BASE 0x30000000
-#define K2HK_ASYNC_EMIF_DATA_CE1_BASE 0x34000000
-#define K2HK_ASYNC_EMIF_DATA_CE2_BASE 0x38000000
-#define K2HK_ASYNC_EMIF_DATA_CE3_BASE 0x3c000000
-
#define K2HK_PLL_CNTRL_BASE 0x02310000
#define CLOCK_BASE K2HK_PLL_CNTRL_BASE
#define KS2_RSTCTRL (K2HK_PLL_CNTRL_BASE + 0xe8)
diff --git a/arch/arm/include/asm/arch-keystone/hardware.h b/arch/arm/include/asm/arch-keystone/hardware.h
index 6c532ca..ffdecbf 100644
--- a/arch/arm/include/asm/arch-keystone/hardware.h
+++ b/arch/arm/include/asm/arch-keystone/hardware.h
@@ -22,32 +22,6 @@
typedef volatile unsigned int dv_reg;
typedef volatile unsigned int *dv_reg_p;
-#define ASYNC_EMIF_NUM_CS 4
-#define ASYNC_EMIF_MODE_NOR 0
-#define ASYNC_EMIF_MODE_NAND 1
-#define ASYNC_EMIF_MODE_ONENAND 2
-#define ASYNC_EMIF_PRESERVE -1
-
-struct async_emif_config {
- unsigned mode;
- unsigned select_strobe;
- unsigned extend_wait;
- unsigned wr_setup;
- unsigned wr_strobe;
- unsigned wr_hold;
- unsigned rd_setup;
- unsigned rd_strobe;
- unsigned rd_hold;
- unsigned turn_around;
- enum {
- ASYNC_EMIF_8 = 0,
- ASYNC_EMIF_16 = 1,
- ASYNC_EMIF_32 = 2,
- } width;
-};
-
-void init_async_emif(int num_cs, struct async_emif_config *config);
-
struct ddr3_phy_config {
unsigned int pllcr;
unsigned int pgcr1_mask;
@@ -145,6 +119,10 @@ struct ddr3_emif_config {
#define KS2_UART0_BASE 0x02530c00
#define KS2_UART1_BASE 0x02531000
+/* AEMIF */
+#define KS2_AEMIF_CNTRL_BASE 0x21000a00
+#define DAVINCI_ASYNC_EMIF_CNTRL_BASE KS2_AEMIF_CNTRL_BASE
+
#ifdef CONFIG_SOC_K2HK
#include <asm/arch/hardware-k2hk.h>
#endif
diff --git a/arch/arm/include/asm/arch-keystone/nand_defs.h b/arch/arm/include/asm/arch-keystone/nand_defs.h
deleted file mode 100644
index 58417db..0000000
--- a/arch/arm/include/asm/arch-keystone/nand_defs.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * nand driver definitions to re-use davinci nand driver on Keystone2
- *
- * (C) Copyright 2012-2014
- * Texas Instruments Incorporated, <www.ti.com>
- * (C) Copyright 2007 Sergey Kubushyn <ksi@koi8.net>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-#ifndef _NAND_DEFS_H_
-#define _NAND_DEFS_H_
-
-#include <asm/arch/hardware.h>
-#include <linux/mtd/nand.h>
-
-#define MASK_CLE 0x4000
-#define MASK_ALE 0x2000
-
-#define NAND_READ_START 0x00
-#define NAND_READ_END 0x30
-#define NAND_STATUS 0x70
-
-#endif
diff --git a/arch/arm/include/asm/arch-tnetv107x/emif_defs.h b/arch/arm/include/asm/arch-tnetv107x/emif_defs.h
deleted file mode 100644
index 9969a01..0000000
--- a/arch/arm/include/asm/arch-tnetv107x/emif_defs.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm/arch-davinci/emif_defs.h>
diff --git a/arch/arm/include/asm/arch-tnetv107x/hardware.h b/arch/arm/include/asm/arch-tnetv107x/hardware.h
index 2a7ca4e..d458e0b 100644
--- a/arch/arm/include/asm/arch-tnetv107x/hardware.h
+++ b/arch/arm/include/asm/arch-tnetv107x/hardware.h
@@ -155,4 +155,6 @@ int wdt_kick(void);
#define INTC_HINT_EN (TNETV107X_INTC_BASE + 0x1500)
#define INTC_EN_CLR0 (TNETV107X_INTC_BASE + 0x380)
+#define DAVINCI_ASYNC_EMIF_CNTRL_BASE TNETV107X_ASYNC_EMIF_CNTRL_BASE
+
#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/include/asm/arch-tnetv107x/nand_defs.h b/arch/arm/include/asm/arch-tnetv107x/nand_defs.h
deleted file mode 100644
index b298fba..0000000
--- a/arch/arm/include/asm/arch-tnetv107x/nand_defs.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * TNETV107X: NAND definitions
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-#ifndef _NAND_DEFS_H_
-#define _NAND_DEFS_H_
-
-#include <asm/arch/hardware.h>
-#include <asm/arch/emif_defs.h>
-
-#define DAVINCI_ASYNC_EMIF_CNTRL_BASE TNETV107X_ASYNC_EMIF_CNTRL_BASE
-
-#define MASK_CLE 0x4000
-#define MASK_ALE 0x2000
-
-#define NAND_READ_START 0x00
-#define NAND_READ_END 0x30
-#define NAND_STATUS 0x70
-
-extern void davinci_nand_init(struct nand_chip *nand);
-
-#endif
diff --git a/arch/arm/include/asm/arch-keystone/emif_defs.h b/arch/arm/include/asm/ti-common/davinci_nand.h
index a3378aa..11407be 100644
--- a/arch/arm/include/asm/arch-keystone/emif_defs.h
+++ b/arch/arm/include/asm/ti-common/davinci_nand.h
@@ -1,23 +1,45 @@
/*
- * emif definitions to re-use davinci emif driver on Keystone2
+ * NAND Flash Driver
*
- * (C) Copyright 2012-2014
- * Texas Instruments Incorporated, <www.ti.com>
- * (C) Copyright 2007 Sergey Kubushyn <ksi@koi8.net>
+ * Copyright (C) 2006-2014 Texas Instruments.
*
- * SPDX-License-Identifier: GPL-2.0+
+ * Based on Linux DaVinci NAND driver by TI.
*/
-#ifndef _EMIF_DEFS_H_
-#define _EMIF_DEFS_H_
+#ifndef _DAVINCI_NAND_H_
+#define _DAVINCI_NAND_H_
+
+#include <linux/mtd/nand.h>
#include <asm/arch/hardware.h>
+#define NAND_READ_START 0x00
+#define NAND_READ_END 0x30
+#define NAND_STATUS 0x70
+
+#define MASK_CLE 0x10
+#define MASK_ALE 0x08
+
+#ifdef CONFIG_SYS_NAND_MASK_CLE
+#undef MASK_CLE
+#define MASK_CLE CONFIG_SYS_NAND_MASK_CLE
+#endif
+#ifdef CONFIG_SYS_NAND_MASK_ALE
+#undef MASK_ALE
+#define MASK_ALE CONFIG_SYS_NAND_MASK_ALE
+#endif
+
struct davinci_emif_regs {
uint32_t ercsr;
uint32_t awccr;
uint32_t sdbcr;
uint32_t sdrcr;
- uint32_t abncr[4];
+ union {
+ uint32_t abncr[4];
+ uint32_t ab1cr;
+ uint32_t ab2cr;
+ uint32_t ab3cr;
+ uint32_t ab4cr;
+ };
uint32_t sdtimr;
uint32_t ddrsr;
uint32_t ddrphycr;
@@ -56,18 +78,21 @@ struct davinci_emif_regs {
#define DAVINCI_NANDFCR_1BIT_ECC_START(n) (1 << (8 + ((n) - 2)))
#define DAVINCI_NANDFCR_4BIT_ECC_START (1 << 12)
#define DAVINCI_NANDFCR_4BIT_CALC_START (1 << 13)
+#define DAVINCI_NANDFCR_CS2NAND (1 << 0)
/* Chip Select setup */
#define DAVINCI_ABCR_STROBE_SELECT (1 << 31)
#define DAVINCI_ABCR_EXT_WAIT (1 << 30)
-#define DAVINCI_ABCR_WSETUP(n) ((n) << 26)
-#define DAVINCI_ABCR_WSTROBE(n) ((n) << 20)
-#define DAVINCI_ABCR_WHOLD(n) ((n) << 17)
-#define DAVINCI_ABCR_RSETUP(n) ((n) << 13)
-#define DAVINCI_ABCR_RSTROBE(n) ((n) << 7)
-#define DAVINCI_ABCR_RHOLD(n) ((n) << 4)
-#define DAVINCI_ABCR_TA(n) ((n) << 2)
+#define DAVINCI_ABCR_WSETUP(n) (n << 26)
+#define DAVINCI_ABCR_WSTROBE(n) (n << 20)
+#define DAVINCI_ABCR_WHOLD(n) (n << 17)
+#define DAVINCI_ABCR_RSETUP(n) (n << 13)
+#define DAVINCI_ABCR_RSTROBE(n) (n << 7)
+#define DAVINCI_ABCR_RHOLD(n) (n << 4)
+#define DAVINCI_ABCR_TA(n) (n << 2)
#define DAVINCI_ABCR_ASIZE_16BIT 1
#define DAVINCI_ABCR_ASIZE_8BIT 0
+void davinci_nand_init(struct nand_chip *nand);
+
#endif
diff --git a/arch/arm/include/asm/ti-common/ti-aemif.h b/arch/arm/include/asm/ti-common/ti-aemif.h
new file mode 100644
index 0000000..4a311d4
--- /dev/null
+++ b/arch/arm/include/asm/ti-common/ti-aemif.h
@@ -0,0 +1,39 @@
+/*
+ * AEMIF definitions
+ *
+ * (C) Copyright 2012-2014
+ * Texas Instruments Incorporated, <www.ti.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _AEMIF_H_
+#define _AEMIF_H_
+
+#define AEMIF_NUM_CS 4
+#define AEMIF_MODE_NOR 0
+#define AEMIF_MODE_NAND 1
+#define AEMIF_MODE_ONENAND 2
+#define AEMIF_PRESERVE -1
+
+struct aemif_config {
+ unsigned mode;
+ unsigned select_strobe;
+ unsigned extend_wait;
+ unsigned wr_setup;
+ unsigned wr_strobe;
+ unsigned wr_hold;
+ unsigned rd_setup;
+ unsigned rd_strobe;
+ unsigned rd_hold;
+ unsigned turn_around;
+ enum {
+ AEMIF_WIDTH_8 = 0,
+ AEMIF_WIDTH_16 = 1,
+ AEMIF_WIDTH_32 = 2,
+ } width;
+};
+
+void aemif_init(int num_cs, struct aemif_config *config);
+
+#endif