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authorYe Li <ye.li@nxp.com>2017-03-06 15:27:05 +0800
committerYe Li <ye.li@nxp.com>2017-04-05 14:05:57 +0800
commitcbcbf4f2d3c3288d3bcc8116ac337a8b37834efa (patch)
tree55bdbc02ede6045d57ef87bf87c57c6206406c06 /arch
parentcbd4189400de5562a958140048947f3260ee9130 (diff)
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MLK-14326-5 mx6qpsabreauto: Enable OF_CONTROL and DM driver
Update mx6qpsabreauto build configurations to use OF_CONTROL and DM driver. Also add the imx6qpsabreauto DTS file for using DTB. Signed-off-by: Ye Li <ye.li@nxp.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/Makefile3
-rw-r--r--arch/arm/dts/imx6qp-sabreauto-ecspi.dts40
-rw-r--r--arch/arm/dts/imx6qp-sabreauto-gpmi-weim.dts50
-rw-r--r--arch/arm/dts/imx6qp-sabreauto.dts91
4 files changed, 184 insertions, 0 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index c46b679..eb75873 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -325,6 +325,9 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \
imx6q-sabreauto.dtb \
imx6q-sabreauto-ecspi.dtb \
imx6q-sabreauto-gpmi-weim.dtb \
+ imx6qp-sabreauto.dtb \
+ imx6qp-sabreauto-ecspi.dtb \
+ imx6qp-sabreauto-gpmi-weim.dtb \
imx6sx-sabreauto.dtb \
imx6q-sabresd.dtb \
imx6qp-sabresd.dtb \
diff --git a/arch/arm/dts/imx6qp-sabreauto-ecspi.dts b/arch/arm/dts/imx6qp-sabreauto-ecspi.dts
new file mode 100644
index 0000000..8846739
--- /dev/null
+++ b/arch/arm/dts/imx6qp-sabreauto-ecspi.dts
@@ -0,0 +1,40 @@
+/*
+ * Copyright (C) 2015 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "imx6qp-sabreauto.dts"
+
+&ecspi1 {
+ pinctrl-assert-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&can2 {
+ /* max7310_c on i2c3 is gone */
+ status = "disabled";
+};
+
+&i2c3 {
+ /* pin conflict with ecspi1 */
+ status = "disabled";
+};
+
+&uart3 {
+ /* the uart3 depends on the i2c3, so disable it too. */
+ status = "disabled";
+};
+
+&usbh1 {
+ /* max7310_b on i2c3 is gone */
+ status = "disabled";
+};
+
+&usbotg {
+ /* max7310_c on i2c3 is gone */
+ status = "okay";
+ dr_mode = "peripheral";
+};
diff --git a/arch/arm/dts/imx6qp-sabreauto-gpmi-weim.dts b/arch/arm/dts/imx6qp-sabreauto-gpmi-weim.dts
new file mode 100644
index 0000000..b91ebad
--- /dev/null
+++ b/arch/arm/dts/imx6qp-sabreauto-gpmi-weim.dts
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2015 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "imx6qp-sabreauto.dts"
+
+&ecspi1 {
+ /* pin conflict with weim */
+ status = "disabled";
+};
+
+&can2 {
+ /* max7310_c on i2c3 is gone */
+ status = "disabled";
+};
+
+&gpmi {
+ compatible = "fsl,imx6qp-gpmi-nand";
+ status = "okay";
+};
+
+&i2c3 {
+ /* pin conflict with weim */
+ status = "disabled";
+};
+
+&uart3 {
+ /* pin conflict with gpmi and weim */
+ status = "disabled";
+};
+
+&usbh1 {
+ /* max7310_b on i2c3 is gone */
+ status = "disabled";
+};
+
+&usbotg {
+ /* max7310_c on i2c3 is gone */
+ status = "okay";
+ dr_mode = "peripheral";
+};
+
+&weim {
+ pinctrl-assert-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/imx6qp-sabreauto.dts b/arch/arm/dts/imx6qp-sabreauto.dts
new file mode 100644
index 0000000..d06d7b1
--- /dev/null
+++ b/arch/arm/dts/imx6qp-sabreauto.dts
@@ -0,0 +1,91 @@
+/*
+ * Copyright (C) 2015 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "imx6q-sabreauto.dts"
+#include "imx6qp.dtsi"
+
+/ {
+ model = "Freescale i.MX6 Quad Plus SABRE Automotive Board";
+};
+
+&mxcfb1 {
+ prefetch;
+};
+
+&mxcfb2 {
+ prefetch;
+};
+
+&mxcfb3 {
+ prefetch;
+};
+
+&mxcfb4 {
+ prefetch;
+};
+
+&fec {
+ pinctrl-assert-gpios = <&max7322 0 GPIO_ACTIVE_HIGH>;
+};
+
+&i2c2 {
+ max7322: gpio@68 {
+ compatible = "maxim,max7322";
+ reg = <0x68>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+};
+
+&pcie {
+ reset-gpio = <&max7310_c 5 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&pre1 {
+ status = "okay";
+};
+
+&pre2 {
+ status = "okay";
+};
+
+&pre3 {
+ status = "okay";
+};
+
+&pre4 {
+ status = "okay";
+};
+
+&prg1 {
+ memory-region = <&memory>;
+ status = "okay";
+};
+
+&prg2 {
+ memory-region = <&memory>;
+ status = "okay";
+};
+
+&reg_sd3_vmmc {
+ status = "okay";
+};
+
+&sata {
+ status = "okay";
+};
+
+&usdhc3 {
+ vmmc-supply = <&reg_sd3_vmmc>;
+};
+
+&vgen3_reg {
+ regulator-always-on;
+};
+