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authorYork Sun <york.sun@nxp.com>2016-04-07 09:56:48 -0700
committerYork Sun <york.sun@nxp.com>2016-05-19 10:47:11 -0700
commitcb1629f91a487e34284868a2d246bc3b122c6395 (patch)
treee9ef00eed95ae5ffea9a27a60d23acfe6efce243 /arch
parentaeaec0e682f45b9e0c62c522fafea353931f73ed (diff)
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powerpc: Disable flush or invalidate dcache by range for some SoCs
Commit ac337168a unified functions to flush and invalidate dcache by range. These two functions were no-op for SoCs other than 4xx and MPC86xx. Adding these functions seemed to be correct but introduced issues when the dcache is flushed. While the root cause is under investigation, disable these functions for affected SoCs so various drivers can work. Signed-off-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/lib/ppccache.S4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/powerpc/lib/ppccache.S b/arch/powerpc/lib/ppccache.S
index b96dbc6..66cf02d 100644
--- a/arch/powerpc/lib/ppccache.S
+++ b/arch/powerpc/lib/ppccache.S
@@ -65,6 +65,7 @@ ppcSync:
* flush_dcache_range(unsigned long start, unsigned long stop)
*/
_GLOBAL(flush_dcache_range)
+#if defined(CONFIG_4xx) || defined(CONFIG_MPC86xx)
li r5,L1_CACHE_BYTES-1
andc r3,r3,r5
subf r4,r3,r4
@@ -77,6 +78,7 @@ _GLOBAL(flush_dcache_range)
addi r3,r3,L1_CACHE_BYTES
bdnz 1b
sync /* wait for dcbst's to get to ram */
+#endif
blr
/*
@@ -87,6 +89,7 @@ _GLOBAL(flush_dcache_range)
* invalidate_dcache_range(unsigned long start, unsigned long stop)
*/
_GLOBAL(invalidate_dcache_range)
+#if defined(CONFIG_4xx) || defined(CONFIG_MPC86xx)
li r5,L1_CACHE_BYTES-1
andc r3,r3,r5
subf r4,r3,r4
@@ -100,5 +103,6 @@ _GLOBAL(invalidate_dcache_range)
addi r3,r3,L1_CACHE_BYTES
bdnz 1b
sync /* wait for dcbi's to get to ram */
+#endif
blr