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authorStefan Reinauer <reinauer@chromium.org>2012-11-03 11:41:39 +0000
committerSimon Glass <sjg@chromium.org>2012-12-06 14:30:44 -0800
commitc94663170b6a27279d4277d42013d55d8d33a292 (patch)
tree1e6fb4ebe2ca36ad71eb2ace7d77bd365d6088fd /arch
parent2b9d2252aa6f4c6ed81d6beee1e43127b4bc13f4 (diff)
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x86: drop unused code in coreboot.c
The function setup_pcat_compatibility() is weak and implemented as empty function in board.c hence we don't have to override that with another empty function. monitor_flash_len is unused, drop it. Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/cpu/coreboot/coreboot.c7
1 files changed, 0 insertions, 7 deletions
diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c
index 6e196d7..9c9431e 100644
--- a/arch/x86/cpu/coreboot/coreboot.c
+++ b/arch/x86/cpu/coreboot/coreboot.c
@@ -35,8 +35,6 @@
DECLARE_GLOBAL_DATA_PTR;
-unsigned long monitor_flash_len = CONFIG_SYS_MONITOR_LEN;
-
/*
* Miscellaneous platform dependent initializations
*/
@@ -93,7 +91,6 @@ void show_boot_progress(int val)
outb(val, 0x80);
}
-
int last_stage_init(void)
{
return 0;
@@ -111,10 +108,6 @@ int board_eth_init(bd_t *bis)
return pci_eth_init(bis);
}
-void setup_pcat_compatibility()
-{
-}
-
#define MTRR_TYPE_WP 5
#define MTRRcap_MSR 0xfe
#define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg))