diff options
| author | Simon Glass <sjg@chromium.org> | 2016-11-13 14:22:12 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2016-11-25 17:59:31 -0700 |
| commit | aede3acc9cd68fc288ded462568d00e8615550a2 (patch) | |
| tree | ef15ef23091209063ccfff9d7f620428431c7126 /arch | |
| parent | 38ffcb679b1694f8ebf4e5670614fb830ae0c2f2 (diff) | |
| download | u-boot-imx-aede3acc9cd68fc288ded462568d00e8615550a2.zip u-boot-imx-aede3acc9cd68fc288ded462568d00e8615550a2.tar.gz u-boot-imx-aede3acc9cd68fc288ded462568d00e8615550a2.tar.bz2 | |
rockchip: Move jerry SDRAM settings into its own .dts file
The SDRAM settings are not common across all veyron models. Move the
current settings into Jerry's file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/rk3288-veyron-jerry.dts | 11 | ||||
| -rw-r--r-- | arch/arm/dts/rk3288-veyron.dtsi | 8 |
2 files changed, 11 insertions, 8 deletions
diff --git a/arch/arm/dts/rk3288-veyron-jerry.dts b/arch/arm/dts/rk3288-veyron-jerry.dts index da37ea8..8aab607 100644 --- a/arch/arm/dts/rk3288-veyron-jerry.dts +++ b/arch/arm/dts/rk3288-veyron-jerry.dts @@ -55,6 +55,17 @@ }; }; +&dmc { + rockchip,pctl-timing = <0x29a 0xc8 0x1f4 0x42 0x4e 0x4 0xea 0xa + 0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7 + 0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0 + 0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0 + 0x5 0x0>; + rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200 + 0xa60 0x40 0x10 0x0>; + rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>; +}; + &gpio_keys { power { gpios = <&gpio0 5 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/dts/rk3288-veyron.dtsi b/arch/arm/dts/rk3288-veyron.dtsi index 2ffe39c..a314058 100644 --- a/arch/arm/dts/rk3288-veyron.dtsi +++ b/arch/arm/dts/rk3288-veyron.dtsi @@ -245,14 +245,6 @@ 533000 1150000 666000 1200000 >; - rockchip,pctl-timing = <0x29a 0xc8 0x1f4 0x42 0x4e 0x4 0xea 0xa - 0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7 - 0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0 - 0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0 - 0x5 0x0>; - rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200 - 0xa60 0x40 0x10 0x0>; - rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>; }; &efuse { |