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authorPeng Fan <Peng.Fan@freescale.com>2015-10-29 15:54:39 +0800
committerStefano Babic <sbabic@denx.de>2015-11-12 17:38:08 +0100
commit95ae700044ee54c01ae7c5e52cd4a28f1aed4533 (patch)
tree5a6773672f4ec4ead10dc8aabe15e48e3fb50661 /arch
parent233509a5b8710e53dd11757d6f4e1c8c264cad56 (diff)
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mxs: add parameter base_addr for mxs_set_lcdclk
Change mxs_set_lcdclk prototype to add a new parameter base_addr. There are two LCD interfaces for i.MX6SX, we may support LCDIF1 or LCDIF2. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Anatolij Gustschin <agust@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/cpu/arm926ejs/mxs/clock.c2
-rw-r--r--arch/arm/include/asm/arch-mxs/clock.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/cpu/arm926ejs/mxs/clock.c b/arch/arm/cpu/arm926ejs/mxs/clock.c
index e9d8800..9491096 100644
--- a/arch/arm/cpu/arm926ejs/mxs/clock.c
+++ b/arch/arm/cpu/arm926ejs/mxs/clock.c
@@ -309,7 +309,7 @@ void mxs_set_ssp_busclock(unsigned int bus, uint32_t freq)
bus, tgtclk, freq);
}
-void mxs_set_lcdclk(uint32_t freq)
+void mxs_set_lcdclk(uint32_t __maybe_unused lcd_base, uint32_t freq)
{
struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
diff --git a/arch/arm/include/asm/arch-mxs/clock.h b/arch/arm/include/asm/arch-mxs/clock.h
index fc9d75b..fdc5395 100644
--- a/arch/arm/include/asm/arch-mxs/clock.h
+++ b/arch/arm/include/asm/arch-mxs/clock.h
@@ -46,7 +46,7 @@ uint32_t mxc_get_clock(enum mxc_clock clk);
void mxs_set_ioclk(enum mxs_ioclock io, uint32_t freq);
void mxs_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, int xtal);
void mxs_set_ssp_busclock(unsigned int bus, uint32_t freq);
-void mxs_set_lcdclk(uint32_t freq);
+void mxs_set_lcdclk(uint32_t __maybe_unused lcd_base, uint32_t freq);
/* Compatibility with the FEC Ethernet driver */
#define imx_get_fecclk() mxc_get_clock(MXC_AHB_CLK)