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authorMarek Vasut <marex@denx.de>2015-12-29 19:44:02 +0100
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2016-01-31 16:32:56 +0100
commit8890c2fbe6ed4c5ca9a61f21e846a55f8f2c38fc (patch)
treec0b6f821b16e6008872334798f1832b98f06fb07 /arch
parenta592e6fb7f9c1a7c2bf528c70db4b882cbac7537 (diff)
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arm: Remove S bit from MMU section entry
Restore the old behavior of the MMU section entries configuration, which is without the S-bit. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/include/asm/system.h3
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index ab73821..026e7ef 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -274,8 +274,7 @@ static inline void set_dacr(unsigned int val)
/* options available for data cache on each page */
enum dcache_option {
- DCACHE_OFF = TTB_SECT_S_MASK | TTB_SECT_DOMAIN(0) |
- TTB_SECT_XN_MASK | TTB_SECT,
+ DCACHE_OFF = TTB_SECT_DOMAIN(0) | TTB_SECT_XN_MASK | TTB_SECT,
DCACHE_WRITETHROUGH = DCACHE_OFF | TTB_SECT_C_MASK,
DCACHE_WRITEBACK = DCACHE_WRITETHROUGH | TTB_SECT_B_MASK,
DCACHE_WRITEALLOC = DCACHE_WRITEBACK | TTB_SECT_TEX(1),